Hey! I've designed an LNA in Cadence (TSMC 0.35um CMOS technology). After successfully running DRC and LVS, when I tried to run RCX on my layout design, it gave the following errors: 'Can't access compare.rul' 'error loading master control file rcx.trial2.rsf' (my cell view name is trial 2) 'error in loadstring' I read over some forums that you need to update your RSF file but I'm not sure what commands are to be added. I'm using Assura av 3.1. Can anybody help me out? I'll be really grateful!