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 Spice Models in Celtic Analysis 

Last post Thu, Dec 20 2007 9:04 PM by archive. 2 replies.
Started by archive 20 Dec 2007 09:04 PM. Topic has 2 replies and 1265 views
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  • Thu, Dec 20 2007 9:04 PM

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    Spice Models in Celtic Analysis Reply

    Hi, How can we generate spice models (CMOS device - models) in order to run make_cdb for celtic Analysis. What is the importance of spice models in noise library chracterisation. Best Regards Sandeep


    Originally posted in cdnusers.org by sandeepv
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  • Sun, Dec 30 2007 8:34 PM

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    RE: Spice Models in Celtic Analysis Reply

    Spice models depict the I-V relationship of various cells.It is used to compute the holding resistance.Lower the value of holding resistance lesser will be the impact of functional noise.


    Originally posted in cdnusers.org by abhiroy03
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  • Wed, Jan 2 2008 8:37 PM

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    RE: Spice Models in Celtic Analysis Reply

    Hi you can use calibre to generate spice (*.sp) from GDS II . the Calibre Utility name is known as lce ( which is used in LVS ) .

    Please find the command to extract
    calibre -spice CHIP.sp -hcell HCELL cmosx_top.lce_rules > log.lce

    NOTE : i) Hcell is optional
    ii) in rule file you will give the location of your GDS II path for corresponding spice you would like to extract.

    Regards,
    Mohan


    Originally posted in cdnusers.org by mohanch007
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Started by archive at 20 Dec 2007 09:04 PM. Topic has 2 replies.