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 Short between IO filler blockage and IO pad pin 

Last post Thu, Sep 19 2013 12:04 PM by Kari. 3 replies.
Started by maxb 28 Apr 2010 05:20 PM. Topic has 3 replies and 1869 views
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  • Wed, Apr 28 2010 5:20 PM

    • maxb
    • Not Ranked
    • Joined on Thu, Jan 22 2009
    • Kista, Sweden
    • Posts 9
    • Points 135
    Short between IO filler blockage and IO pad pin Reply

    Hi,

    In our design we have IO fillers with blockage for the IO ring power & ground stripes, and IO pads with pins for the same busses. When placing fillers between the IO cells, we see short violations between the pad pins and the filler blockages (see attached image). How can we fix or ignore these violations?

    The LEF for the IO filler and pad looks like:

    MACRO IOFILLER
        ...
        OBS
            LAYER M3 ;
            RECT  0.00 78.50 5.60 104.06 ;
       ...


    MACRO IOPAD
        CLASS PAD ;
        SITE IO ;
        PIN VDD!
            DIRECTION INOUT ;
            USE POWER ;
            PORT
            LAYER M3 ;
            RECT  0.00 78.82 75.04 83.58 ;
    ..

    Link to GUI image: http://i42.tinypic.com/33di5jc.gif

    Thanks in advance,

    /Max

    • Post Points: 20
  • Wed, Apr 28 2010 6:31 PM

    • mikhail
    • Not Ranked
    • Joined on Thu, Dec 4 2008
    • Moscow, 00-RU
    • Posts 9
    • Points 120
    Re: Short between IO filler blockage and IO pad pin Reply

    To avoid shorts you have at least 2 ways:

    1. If blockage represents actual wire in the filler (not pad ring) then shorts are valid and you need to resize pad pin in IO cell to meet spacing (maybe you need to consider width-depended spacing rules).

    2. If blockage comes from pad ring wires in the fille, then you need to define related pins in filler cell. This will close pad ring connections and violations will gone.

    Hope this helps.

    Best regards,
    Mikhail.

    • Post Points: 20
  • Sun, Jul 21 2013 8:15 AM

    • ErezBS
    • Top 500 Contributor
    • Joined on Tue, Nov 6 2012
    • Posts 29
    • Points 400
    Re: Short between IO filler blockage and IO pad pin Reply

    Hi,

    I am facing the same issue right now.

    can you please elaborate what should i check?

    Thanks! 

    • Post Points: 20
  • Thu, Sep 19 2013 12:04 PM

    • Kari
    • Top 10 Contributor
    • Joined on Tue, Jul 15 2008
    • Cary, NC
    • Posts 693
    • Points 14,155
    Re: Short between IO filler blockage and IO pad pin Reply
    it sounds like the LEFs were not designed properly. the fillers should be able to be placed next to the functional IOs without problems. Instead of blockages in the fillers, they should be the actual pwr/gnd pins. you may just have to ignore the violations.
    • Post Points: 5
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Started by maxb at 28 Apr 2010 05:20 PM. Topic has 3 replies.