Hi Ed,Originally posted in cdnusers.org by Kari
That's a difficult question to answer. It's really just a feel you get after working in a certain process for a while. We had a customer that was doing their first 90nm design, and they were very paranoid about hold margin and picked a large number. We knew from doing many 90 nm designs that what he picked was unrealistic, and we were able to suggest something more reasonable. Some folks base it on a percentage of the clock period. Also, it's usually a combination of time to account for clock jitter, and some extra padding. But depending on whether you're using OCV or not, you can adjust the extra padding part. Also, you don't want to pick a hold uncertainty number that makes your design blow up (so many buffers get added that your utilization goes through the roof). Sorry I can't give a more concrete answer.