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 problems with calibre lvs 

Last post Mon, Feb 1 2010 4:32 AM by tkhan. 1 replies.
Started by Francy 13 Jan 2010 03:20 PM. Topic has 1 replies and 2177 views
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  • Wed, Jan 13 2010 3:20 PM

    • Francy
    • Not Ranked
    • Joined on Tue, Jan 12 2010
    • Posts 1
    • Points 20
    problems with calibre lvs Reply

    Dear all.

     

    I've got a problem when I run LVS with Calibre. The circuit extraction report gives me this warning:

    WARNING: Invalid PATHCHK request "! LABELED": no LABELED nets present, operation aborted.

     

    So the circuit extraction aborts, and I can't perform the parasitic extraction.

     

    I inserted label for vdd and gnd, using the layer drawing of the same type of the path I labeled, but the problem didn't disappear. I made the pins using the layer pn, with a label using the layer M_CAD TT.

    Do you know what is the problem?

     

    Thanks a lot,

     

    Francesca 

     

     

     

    • Post Points: 20
  • Mon, Feb 1 2010 4:32 AM

    • tkhan
    • Top 50 Contributor
    • Joined on Sat, Aug 16 2008
    • Toronto, Ontario
    • Posts 159
    • Points 2,220
    Re: problems with calibre lvs Reply

     Calibre is by Mentor Graphics, not Cadence Design Systems. You might want to post this question on their forum.

    • Post Points: 5
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Started by Francy at 13 Jan 2010 03:20 PM. Topic has 1 replies.