After schematic simulation and layout extraction, I got an extracted layout, and then I did the LVS. Finally I want to do the post layout simulation using my extracted layout.
However, I have two problems.
1. I found that if I don't add the model library, e.g., the ami06P and ami06N, the simulation can't succeed. But I think using ami06P and ami06N, it is using the existing models rather than the layout I draw. (I already changed the environment to be "spectre comos_sch cmos.sch extracted schematic veriloga ahdl").
2. In addition, the simulation using the extracted layout just outputs a voltage of 0 V and the input and output current of the layout are both 0 A. I don't know the reason.
Thank you very much.