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 Stop Simulation by Itself 

Last post Tue, Oct 13 2009 6:50 PM by gilberts. 2 replies.
Started by gilberts 13 Oct 2009 01:44 AM. Topic has 2 replies and 1213 views
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  • Tue, Oct 13 2009 1:44 AM

    • gilberts
    • Not Ranked
    • Joined on Tue, Jun 23 2009
    • Posts 9
    • Points 105
    Stop Simulation by Itself Reply

    Is there a way to stop a simulation after a certain condition have been met? - ( VerilogA maybe? )

     

    Example:

    I setup a transient simulation to run for 50m secons.

    The circuit oscillates for an unknown frequency, can be too high or too low.

    In an alter, when the frequency is too high, the simulation time gets too long

    and the results are not anymore necessary.

    I only need to complete 20 cycles to analyze the results,

    so I want to force stop/kill the simulation after completing 20 cycles on the output.

     

    Thanks.

    Gilbert

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    • Post Points: 20
  • Tue, Oct 13 2009 4:47 AM

    Re: Stop Simulation by Itself Reply

    Hi Gilbert,

    This is the kind of thing that can be done with Spectre MDL, but a VerilogA based solution is quite reasonable too. You could use $finish or $finish_current_analysis for this.

    See SourceLink Solutions 11556554 and 11488490.

    Regards,

    Andrew.

    • Post Points: 20
  • Tue, Oct 13 2009 6:50 PM

    • gilberts
    • Not Ranked
    • Joined on Tue, Jun 23 2009
    • Posts 9
    • Points 105
    Re: Stop Simulation by Itself Reply

    Andrew,

    Thank you very much.

     

    Best regards,

    Gilbert

    • Post Points: 5
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Started by gilberts at 13 Oct 2009 01:44 AM. Topic has 2 replies.