Here's my situation: Say I make a schematic of an inverter, and the W and L are pPar() parameters so I can define them when the symbol is added to another schematic. Now I make a schematic with 3 inverter symbols all of different W and L, and I make corresponding layout - how can I do LVS in this case since the W and L are parameters? I found that for a single symbol and its corresponding layout, I could change the Base CDF parameters to match the W and L of the layout, but when there are 3 instances that way doesn't make sense. Any suggestions, if this is even possible?
I'm working with an old PDK which only has Diva rules.