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 Re: SPAM Re: Config View Creation 

Last post Wed, Jun 3 2009 8:13 AM by Andrew Beckett. 1 replies.
Started by mobileee 03 Jun 2009 07:33 AM. Topic has 1 replies and 1165 views
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  • Wed, Jun 3 2009 7:33 AM

    • mobileee
    • Not Ranked
    • Joined on Tue, Jun 2 2009
    • Kharagpur, West Bengal
    • Posts 11
    • Points 170
    Re: SPAM Re: Config View Creation Reply
    Hi Andrew,
     
    I am giving the code below.
     
    ################### SKILL CODE starts HERE ###################
     
    ddUpdateLibList()
    if(ddGetObj("myLib" "cell1" "symbol")
     then ddDeleteLocal(ddGetObj("myLib" "cell1" "symbol" ""))
     else printf("no symbol"))
    ;if(ddGetObj("myLib1" "cell3" "symbol")
    ; then ddDeleteLocal(ddGetObj("myLib1" "cell3" "symbol" ""))
    ; else printf("no symbol"))
    if(ddGetObj("myLib" "cell2" "schematic")
     then ddDeleteLocal(ddGetObj("myLib" "cell2" "schematic" ""))
     else printf("no schematic"))
    editor = "touch"
    schViewToView("myLib" "cell1" "myLib" "cell1" "veriloga" "symbol" "ahdlToPinList" "schPinListToSymbol")
    ;schViewToView("myLib" "deb_pal" "myLib" "deb_pal" "veriloga" "symbol" "ahdlToPinList" "schPinListToSymbol")
    ddUpdateLibList()
    let( (i x y u v d_cellview d_master d_inst wireSpace wireWidth wireLength instTermBbox instTermBboxInCv instTermLLX instTermLLY instTermURX instTermURY          wireOriginX wireOriginY deltaX deltaY wireLabel wireOrientation wireJustification wireEndX wireEndY termWire)
    declare(a[1110])
    i=0
    x=0.0
    y=1.5
    u=2
    v=0
    wireSpace=0.0625
    wireWidth=0
    wireLength=0.6
    ddUpdateLibList()
    editor = "touch"
    d_cellview = dbOpenCellViewByType("myLib" "cell2" "schematic" "schematic" "w")
    d_master1 = dbOpenCellViewByType("myLib" "cell1" "symbol" "schematicSymbol" "r")
    d_master2 = dbOpenCellViewByType("myLib1" "cell3" "symbol" "schematicSymbol" "r")
    schCreateInst(d_cellview d_master1 nil  x:y "R0")
    schCreateInst(d_cellview d_master2 nil  u:v "R0")
    foreach( inst d_cellview~>instances
       printf( "Instance : %s\n" inst~>name)
       foreach( instTerm inst~>instTerms
          instTermBbox = car(instTerm~>term~>pins~>fig~>bBox)
       instTermBboxInCv = dbTransformBBox(instTermBbox
                          inst~>transform)
       printf(" Instance Terminal = %s : absBbox = %L :
                relBbox=%L\n" instTerm~>name
       instTermBbox instTermBboxInCv)
       instTermLLX=xCoord(lowerLeft(instTermBboxInCv))
       instTermLLY=yCoord(lowerLeft(instTermBboxInCv))
       instTermURX=xCoord(upperRight(instTermBboxInCv))
       instTermURY=yCoord(upperRight(instTermBboxInCv))
       wireOriginX=(instTermLLX+instTermURX)/2
       if( (instTerm~>name == "CL<2:0>" || instTerm~>name == "tmin<3:0>" || instTerm~>name == "dsp<1:0>" || instTerm~>name == "bias_rdy" || instTerm~>name == "buck_en" || instTerm~>name == "forcePWM" || instTerm~>name == "ss_speedup_mask" || instTerm~>name == "tsd_n" || instTerm~>name == "uvlo_in" || instTerm~>name == "testos" || instTerm~>name == "tm" || instTerm~>name == "buck_rdy" || instTerm~>name == "clk" || instTerm~>name == "PVDD" || instTerm~>name == "PGND") then
        a[i] = wireOriginX
        i++
        wireOriginY=(instTermLLY+instTermURY)/2
        a[i] = wireOriginY
        i++
       )
       case((instTerm~>name)
        ("CL<2:0>"
        deltaX=0
        deltaY=wireLength
        wireLabel="CL<2:0>"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
          ("tmin<3:0>"
        deltaX=0
        deltaY=wireLength
        wireLabel="Tmin<3:0>"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
          ("dsp<1:0>"
        deltaX=0
        deltaY=wireLength
        wireLabel="dsp<1:0>"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
          ("bias_rdy"
        deltaX=0
        deltaY=wireLength
        wireLabel="bias_rdy"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
         ("buck_en"
        deltaX=0
        deltaY=wireLength
        wireLabel="buck_en"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("forcePWM"
        deltaX=0
        deltaY=wireLength
        wireLabel="forcePWM"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("ss_speedup_mask"
        deltaX=0
        deltaY=wireLength
        wireLabel="ss_speedup_mask"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("tsd_n"
        deltaX=0
        deltaY=wireLength
        wireLabel="tsd_n"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("uvlo_in"
        deltaX=0
        deltaY=wireLength
        wireLabel="uvlo_in"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("testos"
        deltaX=0
        deltaY=wireLength
        wireLabel="uvlo_in"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("tm"
        deltaX=0
        deltaY=wireLength
        wireLabel="uvlo_in"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("PGND"
        deltaX=0
        deltaY=wireLength
        wireLabel="uvlo_in"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("buck_rdy"
        deltaX=0
        deltaY=wireLength
        wireLabel="uvlo_in"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("clk"
        deltaX=0
        deltaY=wireLength
        wireLabel="uvlo_in"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )
            ("PVDD"
        deltaX=0
        deltaY=wireLength
        wireLabel="uvlo_in"
        wireOrientation="R0"
        wireJustification="lowerRight"
      )

      (t
        printf("Unknown Terminal !!!! \n")
        )
      )
       )
       )
    termWire=schCreateWire(d_cellview "draw" "full" list(a[0]:a[1] a[30]:a[31]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[2]:a[3] a[32]:a[33]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[4]:a[5] a[34]:a[35]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[6]:a[7] a[36]:a[37]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[8]:a[9] a[38]:a[39]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[10]:a[11] a[40]:a[41]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[12]:a[13] a[42]:a[43]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[14]:a[15] a[44]:a[45]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[16]:a[17] a[46]:a[47]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[18]:a[19] a[48]:a[49]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[20]:a[21] a[50]:a[51]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[22]:a[23] a[52]:a[53]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[24]:a[25] a[54]:a[55]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[26]:a[27] a[56]:a[57]) wireSpace wireSpace wireWidth)
    termWire=schCreateWire(d_cellview "draw" "full" list(a[28]:a[29] a[58]:a[59]) wireSpace wireSpace wireWidth)
    schCheck(d_cellview)
    getWarn()
    dbSave(d_cellview)
    dbClose(d_cellview)
    deNew('(nil ?libname "myLib" ?cellname "cell2" ?viewName "schematic" ?viewType "config"))
    hiiSetCurrentForm('deNewForm)
    deNewForm->deToolName->value = "Hierarchy-Editor"
    hiFormDone(deNewForm)
     
     
     
    ################### SKILL CODE ends HERE ####################
     
     
    In the above code symbol of the cell3 has about 40 pins including those mentioned in the case statements. In the symbol of cell1 contains only those pins mentioned in case statement. I want to connect the pin say "buck_en" of symbol of cell1 with buck_en of symbol cell3. But the above code generates the schematic where the "buck_en" of symbol of cell1 is getting connected with some other pins of symbol of cell3 but not getting connected with "buck_en". That's the problem. Also I am not able to add label to the created wire.
     
    Hope now you have got a clear idea what I am trying to do. Please suggest a suitable solution of the above problem.
    • Post Points: 20
  • Wed, Jun 3 2009 8:13 AM

    Re: SPAM Re: Config View Creation Reply

    Rather than answer this twice (I hate double posting), I've replied to this on https://www.cadence.com/Community/forums/p/12616/18072.aspx#18072

    So best to stick with just one thread going forward to avoid confusion.

    Regards,

    Andrew.

    • Post Points: 5
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Started by mobileee at 03 Jun 2009 07:33 AM. Topic has 1 replies.