Hi Eric,Originally posted in cdnusers.org by EngHan
For std cell, when I was using a non-cadence flow, pin accessability is done by drawing a metal 1 ring half metal pitch around each std cell, and then try to route from outside the metal1 ring to every pin of the standard cell. I think this can be done about the same way in encounter... just instantiate all types of cells, place them all on one row, and every pins has an IO pin. If the routing fail, then there is accessability problem. No a catch-all solution, but might be useful.
As for macro, I think the best method is to make all pin double pitch, but this usually result in an unnecessary wide pin. As macro's pins is usually at the boundary, there should be no accessability issue. The main issue I have is the modellign of the OBS in the macro to make the router aware of how far to put a wire or via.