I have a question regarding the differences between a PDK/CDK (Process/Cadence Design Kit) and a standard cell library. Sometime people use them interchangeably, but I think there are some inherent differences between these two things. Can anyone clarify this?
The reason I asked this question is because recently I began searching for a MOSIS compatible 130nm or 90nm process for Cadence to do custom IC layout. I personally used GPDK and NCSU before; they have layout/schematic/symbol views for nmos, pmos, metal1-9, vias, nwell, psub... basically components that let users to build a circuit. However, GPDK is not MOSIS compatible and NCSU does not have 130nm or 90nm processes. I recently obtained IBM cms9flp process ARM Standard Cell Library, however, I don't know how to install it with Cadence. For GPDK or NCSU, there is a "lib" folder that contains all the components and their views (for example, lib/nmos/Layout, lib/nmos/Schematic...). However, there is no such thing for the ARM Standard Cell Library I obtained. Is this one of the differences between PDk and Standard Cell Library. Can anyone explain? I am wondering if I should be looking for cms9flp IBM PDK instead of the Standard Library.
Thank you all in advanced!