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 digital simulation of an FPGA 

Last post Mon, Feb 9 2009 10:42 AM by bdatta. 0 replies.
Started by bdatta 09 Feb 2009 10:42 AM. Topic has 0 replies and 1363 views
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  • Mon, Feb 9 2009 10:42 AM

    • bdatta
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    • Joined on Wed, Oct 22 2008
    • Posts 7
    • Points 110
    digital simulation of an FPGA Reply
     I need to run some simulations on a board design that includes and altera FPGA.  I have the FPGA logic design done in quartus and have imported it into allegro in order to create a custom part.  However I dont know how to set this up for simulation.  The verilog file in the entity directory only includes the port declarations.  What steps are needed to set this up for simulation including the internal FPGA logic.
    • Post Points: 5
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Started by bdatta at 09 Feb 2009 10:42 AM. Topic has 0 replies.