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 Is there a voltage probe symbol for analog lib? 

Last post Thu, Oct 9 2008 12:45 PM by aplumb. 1 replies.
Started by Milkman 08 Oct 2008 09:03 AM. Topic has 1 replies and 2346 views
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  • Wed, Oct 8 2008 9:03 AM

    • Milkman
    • Not Ranked
    • Joined on Fri, Jul 18 2008
    • Posts 1
    • Points 20
    Is there a voltage probe symbol for analog lib? Reply

    Designers want a voltage probe that can be instantiated on a schematic.  The voltage probe translates to a .probe statement in hspice netlists or a save netname statement in a spectre netlist.

    Here are my questions

    1.Do I need to use a formInitProc to get the attached netname or a callback procedure?

    2. In the formInitProc or Callback proc, how do I get the value of the netname attached to the terminal?

     Here are the code fragments below.

    ;; netlist procedure to print save netname line in spectre netlist

    ;; procedure( sgSpectreVprobe(inst)
        let((fp net_name enable complete_line cv)
        fp=nlGetNetlister(inst)
    ;; Get value from instance
        net_name = nlGetParamStringValue(inst 'net_name)
        ;cv = nlGetCurrentCellView(inst)
        ;l_nets = nlGetSimTerminalNets(cv)
        ;this_net=car(l_nets)
        enable = nlGetParamStringValue(inst 'enable)
        complete_line = strcat("save net_name")
        nlPrintString(fp)
        nlPrintString(fp complete_line)
        ); let
    );procedure

     

    ############# CDF pararmeter

        cdfCreateParam( cdfId
            ?name           "net_name"
            ?prompt         "net_name"
            ?defValue       "net_name"
            ?type           "string"
        )

     

     

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    • Post Points: 20
  • Thu, Oct 9 2008 12:45 PM

    • aplumb
    • Top 75 Contributor
    • Joined on Wed, Jul 16 2008
    • Ottawa, Ontario
    • Posts 80
    • Points 1,230
    Re: Is there a voltage probe symbol for analog lib? Reply

    I took a different approach and created a 'voltage bsource' device that could be instantiated in a schematic.  A designer can then set the 'v' parameter value to the anything, including simple v(path.to.internal.net) or differential signal expressions.  Then you assign a top-level net name to the bsource output and save as you see fit.

     I created a one-liner model file include to 'save all top-level signals' that designers can quickly enable:

    save * depth=1

    Not precisely what you're looking for, but may be useful if you can't get the vprobe working. 

    Andrew. 

    • Post Points: 5
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Started by Milkman at 08 Oct 2008 09:03 AM. Topic has 1 replies.