Low-power design was certainly a hot topic at CDNLive Silicon Valley last week. One common question that surfaced repeatedly is how one can accurately estimate power. EETimes has just published a great "tips and tricks" article by Brad Miller. In it, Brad outlines at a high level, a great way to bring more power predictability to the logic design and synthesis process.
LukeOriginally posted in cdnusers.org by lukelang