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 Extracting selected delays using Cadence Encounter 

Last post Sat, Sep 6 2008 3:29 AM by Sirrius. 0 replies.
Started by Sirrius 06 Sep 2008 03:29 AM. Topic has 0 replies and 1804 views
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  • Sat, Sep 6 2008 3:29 AM

    • Sirrius
    • Top 500 Contributor
    • Joined on Wed, Aug 13 2008
    • Posts 22
    • Points 275
    Extracting selected delays using Cadence Encounter Reply

    All

    I just finished importing my design into cadence encounter. Now I want to estimate the delays between two given nodes, say, between the two registers that are used in the design.

     I tried looking into Timing -> Calculate Delay, and it generates a .sdf file, which looks something like this:

     

    (DELAYFILE
      (SDFVERSION  "OVI 3.0")
      (DESIGN      "ModCounter")
      (DATE        "Sat Sep  6 03:59:12 2008")
      (VENDOR      "Silicon Perspective, A Cadence Company")
      (PROGRAM     "First Encounter SignalStorm Delay Engine")
      (VERSION     "V1.0")
      (DIVIDER      /)
      (VOLTAGE      5:5:5)
      (PROCESS     "1:1:1")
      (TEMPERATURE  25:25:25)
      (TIMESCALE    1ns)

    (CELL
      (CELLTYPE "ModCounter")
      (INSTANCE )
      (DELAY
        (ABSOLUTE
          (INTERCONNECT data_in[7] MUX/g69/A (0:0:0) (0:0:0))
          (INTERCONNECT data_in[7] REG_B/Q_reg_7/D (0:0:0) (0:0:0))
          (INTERCONNECT data_in[6] MUX/g79/A (0:0:0) (0:0:0))
          (INTERCONNECT data_in[6] REG_B/Q_reg_6/D (0:0:0) (0:0:0))
          (INTERCONNECT data_in[5] MUX/g81/A (0:0:0) (0:0:0))
          (INTERCONNECT data_in[5] REG_B/Q_reg_5/D (0:0:0) (0:0:0))
          (INTERCONNECT data_in[4] MUX/g71/A (0:0:0) (0:0:0))
          (INTERCONNECT data_in[4] REG_B/Q_reg_4/D (0:0:0) (0:0:0))
          (INTERCONNECT data_in[3] MUX/g77/A (0:0:0) (0:0:0))
          (INTERCONNECT data_in[3] REG_B/Q_reg_3/D (0:0:0) (0:0:0))
          (INTERCONNECT data_in[2] MUX/g83/A (0:0:0) (0:0:0))
          (INTERCONNECT data_in[2] REG_B/Q_reg_2/D (0:0:0) (0:0:0))
          (INTERCONNECT data_in[1] MUX/g73/A (0:0:0) (0:0:0))
          (INTERCONNECT data_in[1] REG_B/Q_reg_1/D (0:0:0) (0:0:0))
          (INTERCONNECT data_in[0] MUX/g75/A (0:0:0) (0:0:0))
          (INTERCONNECT data_in[0] REG_B/Q_reg_0/D (0:0:0) (0:0:0))
          (INTERCONNECT clock clock__L1_I0/A (0:0:0) (0:0:0))
          (INTERCONNECT control MUX/g69/B (0.0078:0.0078:0.0078) (0.0078:0.0078:0.0078))
          (INTERCONNECT control MUX/g71/B (0.0088:0.0088:0.0088) (0.0088:0.0088:0.0088))
          (INTERCONNECT control MUX/g77/B (0.0087:0.0087:0.0087) (0.0087:0.0087:0.0087))
          (INTERCONNECT control MUX/g73/B (0.0085:0.0085:0.0085) (0.0085:0.0085:0.0085))
          (INTERCONNECT control MUX/g79/B (0.0098:0.0098:0.0098) (0.0098:0.0098:0.0098))
          (INTERCONNECT control MUX/g75/B (0.004:0.004:0.004) (0.004:0.004:0.004))

     

    now, I could not find enough information on how to interpret the files (particularly, the stuff like:  (0.004:0.004:0.004).

     So, my question is: 

    a). Can someone please help me understand this file?

    b). Is there any way I can generate delay information between two selected points in teh circuit? Like between two registers?

     

    Thanks a lot for the help!

    • Post Points: 5
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Started by Sirrius at 06 Sep 2008 03:29 AM. Topic has 0 replies.