One thing to note when designing for low power using advanced LP methodologies is: Make sure the library you are using has the required low power cells
Multiple supply voltage: Level shifter cells
Power shutoff: Isolation cells, power switch cells
Libraries for older process nodes (130nm and older) usually will not contain the cells above, so you might have to design them before you can use them.
Questions? Comment? Feel free to post!
Originally posted in cdnusers.org by wtan