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 LVS Analysis Error 

Last post Thu, Aug 28 2008 11:43 AM by dineshp. 5 replies.
Started by dineshp 06 Aug 2008 04:04 AM. Topic has 5 replies and 4953 views
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  • Wed, Aug 6 2008 4:04 AM

    • dineshp
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    • Joined on Wed, Aug 6 2008
    • Posts 11
    • Points 160
    LVS Analysis Error Reply

    Hi,

    I'm new to Cadence layout and was running a tutorial available in cdnshelp called the "Cell Design Tutorial". This tutorial is located in $CDSDIR/doc/celltut/celltut.pdf

    It uses some Cadence supplied technology files and libraries available at $CDSDIR/tools.lnx86/dfII/samples/tutorials/le/cell_design/

    The supplied library has a predefined a mux, including schematic and layout views. The LVS flow is to first extract connectivity from the layout by using the Verify -> Extract comand in Virtuoso. Next, LVS is performed between the extracted cell view and the schematic by running Verify -> LVS in Virtuoso. This results in an analysis error, i.e. LVS aborts, with the following log:

    Begin netlist at:    Aug  6 11:20:04 2008
        view name list    = ("auLvs" "schematic" "cmos_sch" "netlist" "symbol")
        stop name list    = ("auLvs")
        library name    = "master"
        cell name    = "mux2"
        view name    = "schematic"
        globals lib    = "basic"
    End netlist:    Aug  6 11:20:04 2008

    Begin netlist at:    Aug  6 11:20:04 2008
        view name list    = ("auLvs" "extracted" "schematic" "symbol")
        stop name list    = ("auLvs")
        library name    = "master"
        cell name    = "mux2"
        view name    = "extracted"
        globals lib    = "basic"
    global error:
    ( pfet symbol ) in library sample has been changed since it was last extracted.
    global error:
    ( nfet symbol ) in library sample has been changed since it was last extracted.
        si: Netlist did not complete successfully.
    End netlist:    Aug  6 11:20:04 2008

    Comparison program did not complete. Check the log.

    Can somebody please tell me how I can get rid of this? When I check the hierarchical tree, I find that the extracted layout consists of pfet and nfet ivpcells from the sample library. I'm guess its some sort of time stamping error. How can I force everything to be current? 

    Really appreciate any help!

     

    • Post Points: 20
  • Wed, Aug 6 2008 7:24 AM

    • dmay
    • Top 25 Contributor
    • Joined on Thu, Jul 17 2008
    • Allen, TX
    • Posts 393
    • Points 7,415
    Re: LVS Analysis Error Reply

    Looks to me like you'll need to Check&Save the pfet and nfet symbols in the sample library so the netlister will complete.

    -Derek

    • Post Points: 20
  • Wed, Aug 6 2008 9:20 AM

    • dineshp
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    • Joined on Wed, Aug 6 2008
    • Posts 11
    • Points 160
    Re: LVS Analysis Error Reply

    Derek, Many thanks for replying.

    The sample library is a read only library. Is it necessary to actually copy this library somewhere and redefine everything to point to the new library? Is this some kind of bug?

    • Post Points: 20
  • Wed, Aug 6 2008 10:55 AM

    • dineshp
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    • Joined on Wed, Aug 6 2008
    • Posts 11
    • Points 160
    Re: LVS Analysis Error Reply

    Could someone also please shed some light on the following!

    All the predefined cells in this particular tutorial use parameterised cells from a library called pCells. Nowhere is the samples library used in the actual layout, at any level of hierarchy. The explanation provided in the tutorial is that device occurences in the layout are identifed by being mapped to an instance of either an nfet or pfet ivpcell. An ivpcell is described as a special parameterized cell used by the verification program to display devices. It is my guess that these ivpcells reside in the samples library, and some mismatch with a time stamp causes the error.

    Where is the rule that points to these particular ivpcells (i.e. the ones in the sample library) defined please? How can I change it?

    Many thanks in advance. 

    • Post Points: 5
  • Wed, Aug 13 2008 10:08 AM

    • dmay
    • Top 25 Contributor
    • Joined on Thu, Jul 17 2008
    • Allen, TX
    • Posts 393
    • Points 7,415
    Re: LVS Analysis Error Reply

    It sounds like this would be a bug in the Sample library. Either open up the permissions and do the check and save so the sample is good for everyone who wants to use it, or make a copy, but a check & save is a requirement to fix cells that need extraction.

    • Post Points: 20
  • Thu, Aug 28 2008 11:43 AM

    • dineshp
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    • Joined on Wed, Aug 6 2008
    • Posts 11
    • Points 160
    Re: LVS Analysis Error Reply

    Thanks Allen, a few changes in the rule file to point to the corrrect cells fixed things.

    • Post Points: 5
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Started by dineshp at 06 Aug 2008 04:04 AM. Topic has 5 replies.