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Cadence Academic Network Forum

Page 5 of 7     First 1234567 Last
  Topics   Replies     Views     Last Post  
Post Help so quickly please...
started by desperado8  on 25 Dec 2011 09:43 AM   
0 785 By desperado8
25 Dec 2011 09:43 AM   
Post New guy questions
started by imagiro1  on 16 Dec 2011 07:22 PM   
1 547 By Abhishek Rai
21 Dec 2011 12:36 PM   
Post not able to design 7447A 7segment IC in Pspice
started by tushi  on 02 Dec 2011 10:37 PM   
2 1922 By sorabhd
05 Dec 2011 07:21 PM   
Post PCB Design GXL trace model
started by john2003tw  on 05 Dec 2011 06:54 PM   
0 546 By john2003tw
05 Dec 2011 06:54 PM   
Post Spicy Schematics for iPad - great for students, engineers, and professors!
started by EdPat  on 03 Nov 2011 06:32 PM   
0 769 By EdPat
03 Nov 2011 06:32 PM   
Post SRAM design and simulation
started by 13061975  on 13 Oct 2011 02:08 AM   
0 1042 By 13061975
13 Oct 2011 02:08 AM   
Post Priority- immediate help to vary resistance
started by shilpakhetan  on 21 Sep 2011 05:33 AM   
3 945 By shilpakhetan
21 Sep 2011 10:00 PM   
Post cdsnameserver malware?
started by stationsscan  on 15 Dec 2010 12:31 AM   
1 1863 By Grue42
21 Sep 2011 01:13 PM   
Post divaDRC.rul file
started by Nerva  on 18 Sep 2011 05:35 PM   
0 809 By Nerva
18 Sep 2011 05:35 PM   
Post ncsdfc syntax error
started by kafka  on 27 Aug 2011 01:14 AM   
0 512 By kafka
27 Aug 2011 01:14 AM   
Post Help regarding the error "Time step too small in OrCAD PSpice"
started by shilpakhetan  on 19 Aug 2011 05:21 AM   
1 1497 By alokt
22 Aug 2011 06:36 AM   
Post EVAL.LIB
started by aa9vt  on 29 Jun 2011 07:02 AM   
1 1035 By aa9vt
29 Jun 2011 12:39 PM   
Post Calculation of SNR in Flash ADC
started by siva bharadwaj  on 22 Jun 2011 10:42 PM   
0 776 By siva bharadwaj
22 Jun 2011 10:42 PM   
Post To cadence: Simplified guide to PSpice Student (requesting permission to publish document (freely available) for students)
started by LJTardon  on 10 Jun 2011 02:29 PM   
1 722 By Patrick Haspel
14 Jun 2011 10:24 AM   
Post Layout of Triple Well NFET without Pcell
started by bnugent  on 09 Jun 2011 11:54 AM   
1 617 By bnugent
10 Jun 2011 08:43 AM   
Post Problems with SDF file generation in RTL Compiler
started by arminkrieg  on 01 Jun 2011 06:46 AM   
0 1012 By arminkrieg
01 Jun 2011 06:46 AM   
Post TFT and BSIM device equation
started by SilentHunter  on 14 May 2011 08:28 PM   
0 566 By SilentHunter
14 May 2011 08:28 PM   
Post a-Si TFT simulation using cadence
started by azerila  on 01 Apr 2010 04:11 AM   
1 1048 By SilentHunter
14 May 2011 02:48 PM   
Post Help with a Bridge rectifier circuit in PSpice
started by shilpakhetan  on 26 Apr 2011 09:45 PM   
1 4155 By oldmouldy
27 Apr 2011 03:44 AM   
Post How to enable the "Undo Warning!!" dialog box
started by Lina  on 14 Apr 2011 07:21 AM   
2 1186 By Lina
15 Apr 2011 11:21 PM   

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