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Custom IC Design Forum

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  Topics   Replies     Views     Last Post  
Post auCdl view and loading CDF port order through CIW?
started by yayla  on 16 May 2014 12:41 PM   
1 206 By yayla
21 May 2014 10:50 AM   
Post Stop Time in Transient Analysis
started by Hadi Hayati  on 20 May 2014 09:06 AM   
6 356 By Tawna
21 May 2014 09:46 AM   
Post Save Display Information
started by keithd  on 19 Jul 2012 01:42 PM   
5 2078 By Magistus
21 May 2014 04:31 AM   
Post Can gzipped netlist be used in spectre?
started by sram8t  on 19 May 2014 11:38 PM   
1 163 By Tawna
20 May 2014 12:18 PM   
Post Unable to get license feature
started by moo911940  on 19 May 2014 07:04 PM   
1 176 By skillUser
20 May 2014 09:47 AM   
Post Best way to make a serial stream (SPI) for VPWLF?
started by bpdegnan  on 13 May 2014 03:11 PM   
2 209 By Andrew Beckett
15 May 2014 02:44 PM   
Post ADEGXL global optimisation runs only 9 jobs in parallel
started by vamshiky  on 15 May 2014 12:01 AM   
2 173 By vamshiky
15 May 2014 12:29 AM   
Post Help with complete understanding of "vsin" source in Cadence
started by jdp721  on 11 May 2014 11:16 AM   
8 369 By jdp721
14 May 2014 06:03 PM   
Post LDO pz analysis
started by potsticker  on 14 May 2014 05:18 PM   
0 189 By potsticker
14 May 2014 05:18 PM   
Post Unbound pin error from Assura LVS after P&R
started by bjbit  on 25 Oct 2012 02:38 PM   
4 1852 By alperro
14 May 2014 02:16 PM   
Post Intrinsic capacitance Cbs
started by ronaldomponte  on 14 May 2014 10:36 AM   
2 156 By ronaldomponte
14 May 2014 01:12 PM   
Post ADE GXL always pending...
started by heavenevil  on 05 Jun 2012 10:33 AM   
7 2268 By Tom Volden
14 May 2014 08:13 AM   
Post use of run(?sgeHardResources "Virtuoso_Multi_mode_Simulation=x") option
started by Battosai13  on 12 May 2014 08:16 AM   
1 162 By Battosai13
14 May 2014 01:42 AM   
Post spectreMDL Input String in Analyses
started by TroyD  on 13 May 2014 01:39 PM   
0 186 By TroyD
13 May 2014 01:39 PM   
Post ADEXL 1921 error with IC616 on Debian
started by VLSIiitm  on 06 May 2014 07:37 PM   
3 257 By VLSIiitm
13 May 2014 02:29 AM   
Post Area calculation from layout in cadence 6.1.4
started by kpkp  on 04 Mar 2012 05:50 AM   
7 3217 By Andrew Beckett
12 May 2014 02:00 PM   
Post Disable instances in Schematic
started by Zdeno  on 12 May 2014 01:37 AM   
2 157 By Zdeno
12 May 2014 05:04 AM   
Post 2 Stroke bindkey or state machine bindkey application
started by bharath2k4  on 28 Nov 2013 10:21 PM   
9 1137 By Andrew Beckett
12 May 2014 02:40 AM   
Post spectre terminated prematurely due to fatal error.
started by hTmTech  on 11 May 2014 10:49 AM   
3 224 By Andrew Beckett
12 May 2014 02:05 AM   
Post Mismatch and Process Spread data in Monte Carlo simulations
started by Flyyn Rider  on 05 Mar 2014 08:19 AM   
4 684 By Flyyn Rider
11 May 2014 01:21 AM   

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