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Custom IC Design Forum

Page 120 of 159     First ... 116117118119120121122123124 ... Last
  Topics   Replies     Views     Last Post  
Post Assura - directing the output
started by J Wilwert  on 23 Jul 2010 06:22 AM   
3 1145 By Quek
24 Jul 2010 09:29 PM   
Post Spectre stability analysis
started by wighou  on 22 Jul 2010 06:46 AM   
2 4200 By wighou
23 Jul 2010 08:57 AM   
Post How to interpret (monte carlo simulation)?
started by pitter  on 23 Jul 2010 03:59 AM   
3 2025 By Andrew Beckett
23 Jul 2010 04:44 AM   
Post Switching between simulations
started by mhgc  on 22 Jul 2010 09:52 AM   
1 830 By Quek
22 Jul 2010 05:34 PM   
Post Net Name conflict in Virtuoso XL (layout vs. schematic)
started by jimstuy  on 21 Jul 2010 09:45 AM   
1 1606 By Quek
22 Jul 2010 03:22 AM   
Post LVS errors
started by tester  on 20 Jul 2010 09:22 PM   
3 1054 By Quek
22 Jul 2010 02:59 AM   
Post Multiple Model Files
started by Karo  on 21 Jul 2010 08:51 AM   
3 1771 By Andrew Beckett
21 Jul 2010 10:12 AM   
Post Using Skill to get a list of all possible layout layers
started by J Wilwert  on 20 Jul 2010 11:02 AM   
2 1315 By J Wilwert
20 Jul 2010 12:00 PM   
Post creating datasheets with ADE-XL
started by vivkr  on 12 Oct 2009 12:41 AM   
3 1652 By Andrew Beckett
20 Jul 2010 01:50 AM   
Post running simulations over different corners
started by Vijay095  on 19 Jul 2010 02:04 PM   
1 757 By Andrew Beckett
19 Jul 2010 11:15 PM   
Post Anyone done trim-and-sim with Monte Carlo?
started by swdesigner  on 08 Jun 2010 04:01 PM   
9 3252 By MarkSummers
19 Jul 2010 10:14 AM   
Post NLP Expression
started by FORCE  on 18 Jul 2010 11:12 PM   
0 1151 By FORCE
18 Jul 2010 11:12 PM   
Post QRC vs. RCX
started by Vijay095  on 18 Jul 2010 02:28 PM   
3 1697 By Quek
18 Jul 2010 05:27 PM   
Post assura LVS error
started by tester  on 16 Jul 2010 04:06 PM   
2 1113 By tester
18 Jul 2010 11:14 AM   
Post Parasitic extraction query
started by shankarp  on 17 Jul 2010 04:10 AM   
1 1002 By Quek
17 Jul 2010 07:01 PM   
Post change the name of a net in virtuoso XL
started by tester  on 15 Jul 2010 03:26 PM   
4 2004 By tester
16 Jul 2010 01:42 PM   
Post NCSU CDK 1.6, IC v6.1.4, and ADE simulation?
started by elbUtah  on 14 Jul 2010 04:26 PM   
2 1497 By elbUtah
16 Jul 2010 10:49 AM   
Post Use of DC operating point parameters in calculations and plots
started by archive  on 17 Apr 2007 12:40 AM   
11 7259 By Andrew Beckett
16 Jul 2010 08:34 AM   
Post EXT913 error in VirtuosoXL
started by tkhan  on 15 Jul 2010 01:31 PM   
2 1487 By tkhan
16 Jul 2010 05:47 AM   
Post how to use "delete cell" or any block syntax to let Assura ignore bit cell?
started by lijulia  on 09 Jul 2010 06:50 PM   
3 2047 By Quek
13 Jul 2010 07:31 PM   

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