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Digital Implementation Forum

Page 8 of 83     First ... 456789101112 ... Last
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Post Experiensing odd behaviour with encounter
started by Thodoros  on 01 Aug 2013 02:55 AM   
2 362 By Thodoros
01 Aug 2013 11:34 AM   
Post IO filler cell violations power routing
started by amythpai  on 14 May 2013 01:14 AM   
1 630 By Kari
31 Jul 2013 08:33 AM   
Post command to check skew in ets
started by victory2vicky  on 31 Jul 2013 05:30 AM   
0 276 By victory2vicky
31 Jul 2013 05:30 AM   
Post net path name in LEC
started by kienu  on 30 Jul 2013 05:18 AM   
0 247 By kienu
30 Jul 2013 05:18 AM   
Post PSUB2 in TSMC = ? in Global Foundries
started by stinky  on 30 Jul 2013 12:02 AM   
0 336 By stinky
30 Jul 2013 12:02 AM   
Post analyze_early_rail - ERROR: (ENCPARA-1132)
started by Yemelya  on 24 Jul 2013 12:38 PM   
0 274 By Yemelya
24 Jul 2013 12:38 PM   
Post Make macro block pin visible in higher hierarchy
started by Mikutine  on 27 Jun 2013 04:12 AM   
2 470 By Mikutine
22 Jul 2013 08:17 AM   
Post Creating .lib file for a flipflop
started by Digital84  on 13 Jul 2013 08:08 PM   
1 316 By Andrew Beckett
13 Jul 2013 10:57 PM   
Post ELC D-flip flop characterization problem
started by rijudg  on 11 Jul 2013 12:49 PM   
0 359 By rijudg
11 Jul 2013 12:49 PM   
Post IC5141 CDL in skipping passive devices
started by lcaley  on 20 May 2013 01:19 PM   
1 783 By navi2582
08 Jul 2013 05:18 PM   
Post The 'UNITS' attribute should be set in the first lef file (technology lef)
started by Digital84  on 06 Jul 2013 10:22 AM   
1 412 By VKhlyupin
07 Jul 2013 11:54 PM   
Post About timing and slack
started by kasyab  on 30 Jun 2013 09:56 AM   
2 529 By kasyab
06 Jul 2013 11:35 AM   
Post 3rd party supplier for a standard cell library -> UMC 55nm 3v3
started by Terry2000  on 05 Jul 2013 08:31 AM   
0 319 By Terry2000
05 Jul 2013 08:31 AM   
Post Can I use just my top metal to create the entire power rings and strap
started by gops  on 28 Jun 2013 12:02 PM   
1 411 By VKhlyupin
05 Jul 2013 07:02 AM   
Post Is there a way to specify antenna info for top-level terminals?
started by FriendFX  on 17 Jun 2013 08:02 PM   
1 448 By VKhlyupin
05 Jul 2013 06:47 AM   
Post Encounter power rail short
started by Thodoros  on 24 May 2013 05:38 AM   
3 808 By Thodoros
05 Jul 2013 05:52 AM   
Post P&R Optimization
started by Aram Shahinyan  on 03 Jul 2013 07:33 AM   
2 409 By Aram Shahinyan
04 Jul 2013 02:14 AM   
Post Encounter 11, Saving design using OA
started by weebey  on 01 Jul 2013 04:31 PM   
0 336 By weebey
01 Jul 2013 04:31 PM   
Post number of pwell/nwell layers in LSW of cadence virtuoso4.4
started by Rendezvous  on 22 Jun 2013 01:29 PM   
0 344 By Rendezvous
22 Jun 2013 01:29 PM   
Post antenna diodes in LEC
started by kienu  on 20 May 2013 11:41 PM   
1 560 By tstark
20 Jun 2013 10:03 AM   

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