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Cadence Technology Forums
Forum NameTopicsRepliesLast Post
    Hardware/Software Co-Development, Verification and IntegrationModerator: Frank Schirrmeister238518Have You Ever Meet Of The OCTL ...
By: Joshuakoo
10 Sep 2014 02:15 AM
    Functional VerificationModerator: Adam Sherer12333883Exclude signal in IMC in comma ...
By: Julien Gic
16 Sep 2014 01:09 AM
    Functional Verification Shared CodeUpload your code here. Please give a brief summary of how to use it. 56155Re: Shell Script rc
By: tonio
05 Aug 2014 08:28 AM
    Logic Design Synthesis, Equivalence Checking, Low Power Validation, Test
Moderator: Diego Hammerschlag, Vince Pham, Lisa
5461553Using RC to estimate leakage & ...
By: kenearth
28 Aug 2014 11:00 AM
    Digital ImplementationDesign Planning, Place-and-Route, Low Power Implementation, Signoff
Moderator: Bob, Kari, Vince Pham
17095351Re: NRDB-669 Warning
By: ravi ki
10 Sep 2014 12:57 AM
    Custom IC DesignModerator: Andrew Beckett.320813100Re: Failed to open shared obje ...
By: oldmouldy
16 Sep 2014 02:52 AM
    Custom IC SKILLModerator: Andrew Beckett.246311154Re: bcdp
By: Andrew Beckett
15 Sep 2014 10:35 PM
    RF DesignModerator: Andrew Beckett.4911972Re: Problems with IIP3 with PS ...
By: Jesture
07 Sep 2014 07:03 AM
    PCB DesignFrom schematic to autorouting what are your challenges in producing high-speed designs?604422168Re: Cline to Anti-Pad distance ...
By: eddieb1
15 Sep 2014 02:05 PM
    PCB SKILLUpload your SKILL files here. Give a brief summary of how to best use the SKILL code.10914495Re: How to find out which env ...
By: fxffxf
15 Sep 2014 12:02 PM
    IC Packaging and SiP DesignPackaging solutions can make or break the cost budget. What design issues are you facing today? 108281Re: Default finger padstack an ...
10 Sep 2014 06:19 PM
    High Level SynthesisModerator: Rajesh Radhakrishnan715IRUN script
By: tonio
23 Jul 2014 04:01 AM
    Mixed-Signal DesignThis Forum is in place to cover and discuss cross functional topics you may encounter designing and layout a Mixed-Signal Design.
Moderator: Andreas Lenz
106349Re: Problem Simulating Verilog ...
By: Andrew Beckett
09 Sep 2014 05:20 AM
    RAVEL DRC Programming for IC Packaging and PCBEverything related to ICP & PCB DRC rule programming in the RAVEL language. Topics concerning the RAVEL engine and compiler as well as RAVEL flows and integration are also appropriate.
Moderator: Bjoern Lindberg
511Re: Ravel IDE
By: ztzg
05 Mar 2014 05:48 AM
General Topics
Forum NameTopicsRepliesLast Post
    AnnouncementsNews, FAQs, and related info about how to best use the community.
Moderators: Community Operations
1620Re: Is there a Concept HDL for ...
By: Andrew Beckett
27 May 2014 12:07 AM
    Cadence Academic NetworkFOR ACADEMIC INSTITUTIONS: Share your approaches in design and the use of Cadence tools with fellow students and faculty.
Moderator: Patrick Haspel
133322Re: Error Node N00117 is float ...
By: oldmouldy
15 Sep 2014 12:03 PM
    Feedback, Suggestions, and QuestionsProvide feedback on the forums or any other part of the site. Questions and suggestions welcome.
Moderator: Community Operations
213531Cadence version Compatibility
12 Sep 2014 09:39 AM
    JobsPost jobs announcements related primarily, but not exclusively, to jobs utilizing Cadence design tools.5458PCB eCAD Circuit Board Design ...
By: TheForce
13 Aug 2014 01:04 PM

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