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System Design and Verification Blog

System Realization Webinars Start Sept 8th

Starting September 8th Cadence will be hosting a series of webinars about various topics in the area of System Realization. Several of these webinars will be led by members of the System Realization Alliance, sharing their particular views and contributions...  Read More »
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Inside The Virtual File System

As part of my ongoing effort to report and explain interesting topics related to Virtual Platforms, I have published a new article on the ARM DS-5 Virtual File System over at blogs.arm.com . Please head over and take a look to find out more about how...  Read More »
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TLM-driven Design And Verification Methodology Book Author Interviews

The recently published TLM-driven Design and Verification Methodology book has been an immediate hit, receiving critical acclaim. The authors each labored and reveled in the creation process. To give you a little insight into each author's perspective...  Read More »
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Silicon Hive CTO: How Transaction-Based Acceleration Speeds IP Verification And Prevents TV "Crashes"

Jeroen Leijten is Chief Technology Officer for Silicon Hive , a Dutch company that has quickly become one of the world's leading intellectual property (IP) providers of imaging and video processing solutions for rapidly changing market segments such...  Read More »
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System Realization Alliance -- An Industry Collaboration

System Realization is a very broad topic. It encompasses all aspects of system design, from chips to chassis. In particular, innovations in software are driving changes in the value chain, as highlighted in the EDA360 industry vision document . In order...  Read More »
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Software Development Tool Teardown For The Motorola Droid

Lately, device teardowns of consumer electronics have become popular. There are many articles and videos showing what's inside a particular device. EE Times even had an article asking if they were useful and who actually benefits from them (but after...  Read More »
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Changing the Status Quo in SoC to System Hand-off

As part of EDA360 Cadence is learning how to play a more significant role in the SoC-to-System handoff. To date, Cadence has served the SoC market by enabling companies to design and verify faster, bigger, and better SoC devices that get used by their...  Read More »
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What's The Best Way To Reduce SoC Development Costs?

Before I got started with my DAC 2010 customer meetings on Monday morning, I stopped by the DAC Pavilion to hear what Gary Smith had to say in his " Trends and What's Hot at DAC " session. I was very pleased to hear Gary say that Virtual...  Read More »
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Cadence Contributes ESL Methodology To TSMC Reference Flow 11

The EDA360 industry vision document shows how growing complexity and application-driven development are requiring orders-of-magnitude improvements in design productivity. With its new Reference Flow 11 , TSMC has taken an important step towards a standard...  Read More »
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Accelerating Metric-Driven Verification With “Hotswap” on Verification Computing Platform

For a while now, Cadence has been providing leading verification solutions and methodologies such as metric driven verification (MDV). MDV guides verification projects from initial planning to verification closure. Engineers need automated verification...  Read More »
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