Running Incisive on Ubuntu Linux
By Jason Andrews
on March 4, 2010
Ubuntu is by many accounts the most popular and the easiest to use Linux distribution for the desktop. Unfortunately for Linux enthusiasts, Cadence tends to follow the EDA Industry OS Roadmap when selecting operating systems to support. I would guess...
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Filed under: Incisive, linux, Ubuntu, Virtual Machine, Systemm Design and Verification
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Quiet Before The Storm? And What to Expect at DVCon 2010
By Steve Svoboda
on February 22, 2010
In the last couple weeks Mentor did an about-face and decided to embrace SystemC ( I told you that would happen! ), and then Synopsys threw down the gauntlet and decided to buy two Virtual Protoyping companies. Supposedly, the word on the street is they...
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Filed under: System Design and Verification, ESL, SystemC, DVCon
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Moving Past The Missing Model Syndrome
By Jason Andrews
on February 18, 2010
One of the issues that has hindered the progress of using Virtual Platforms for early software development is missing models. I recall seeing Axys Design's Maxsim tool back around 2001 and thinking how cool it was. All the user had to do was drag...
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Filed under: ARM, virtual platform, System Design and Verification, SoC, C-to-Silcon, Fast Models, Models
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Methodology Is Important But Language Matters - Part 2
By Ran Avinun
on February 9, 2010
In this blog, I would like to discuss the direction in the languages that will be chosen for TLM (or ESL) verification. Transaction-Level Models have been used for long time as simulation models. As we start to use more and more high-level synthesis,...
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Filed under: System Design and Verification, Verification planning and management, ESL handoff, C-to-Silicon Compiler, High-Level Synthesis, verification, embedded software, virtual protoype, SystemC, TLM, TLM 2.0-driven design, TLM-driven design
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What Does The History of RTL Adoption Foreshadow For The Future of TLM Methodology Adoption?
By Steven Brown
on February 2, 2010
Cadence is in the vanguard of a movement to a higher level of productivity via the abstraction and automation provided by Transaction Level Modeling (TLM). The industry is motivated to adopt this new methodology by its promise of achieving profitable...
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Filed under: System Design and Verification, verification, IP re-use, RTL, TLM, synthesis
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How Big Is An int?
By Jason Andrews
on January 29, 2010
This week I'm taking a break from my series on Android System Verification to talk about something completely different. One of the interesting things about working on Incisive Software Extensions (ISX) is the wide variety of embedded software and...
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Filed under: ISX, Small Device C Compiler, z80, wishbone, OpenCores
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Methodology Is Important But Language Matters - Part 1
By Ran Avinun
on January 26, 2010
Historical trends in languages Many of us have traveled around the world, and while we can often communicate with local people in our own language, we realize it is best to communicate using the local language. It helps to "break the ice" if...
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Filed under: System Design and Verification, Verification planning and management, OVM, ESL, ASIC/ASSP, C-to-Silicon, virtual platform, TLM, planning and management, virtual prototype, ANSI-C, TLM 2.0-driven design, OSCiI, ESL High Level Synthesis, C program
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Android System Verification Part 6
By Jason Andrews
on January 15, 2010
Welcome to Part 6 of Android System Verification. It's getting hard to trace back to the previous articles, so here is a complete list of links: Part 1 Part 2 Part 3 Part 4 Part 5 Last time I showed how to create hardware stimulus and use coverage...
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Filed under: android, system, emulator, System Design and Verifcation
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Back to Work in 2010
By Jason Andrews
on January 6, 2010
It's back to work in 2010. Thanks for all the great feedback in 2009. I plan to continue to bring readers interesting material about System Design and Verification in 2010. When I got back to work this week I fired up an openSUSE 10.2 VMWare image...
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Filed under: System Design and Verification, linux, code offets, global warming
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Is The Industry Ready For Mainstream Adoption of Higher Abstraction?
By Steven Brown
on January 4, 2010
I was recently part of an industry wide interview conducted by Clive "Max" Maxfield of TechBites . Max is trying to uncover the reality behind the apparent trend to move to the high level abstraction of transactions for design and verification...
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Filed under: System Design and Verification, SystemC, TLM
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