What's Good About Allegro GRE Bundle Editing? SPB16.3 Has Many New Enhancements!
By Gerald "Jerry" Grzenia
on July 28, 2010
The Allegro Global Route Environment (GRE) has expanded its capabilities in the area of bundled editing in the SPB16.3 release. It’s now easier to copy, move, and split bundles. Copy Flow lets you copy the flow path from one bundle to another. Its...
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Filed under: PCB Layout and routing, PCB design, SPB, Allegro PCB Editor, Allegro, PCB Editor, PCB, SPB 16.3, Allegro 16.3, layout, SPB16.3, GRE, global route
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What's Good About Via DRCs In Allegro Constraint Manager? It's In SPB16.3!
By Gerald "Jerry" Grzenia
on July 2, 2010
Current design technologies require extremely tight matching requirements right down to the overall net topologies to ensure that any deviations in propagation delays are minimized. As a result, design guidelines call for matching the number of vias for...
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Filed under: PCB Layout and routing, PCB design, SPB, Allegro PCB Editor, Constraint Manager, via, PCB Editor, PCB, SPB 16.3, Allegro 16.3, "PCB design", SPB16.3
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What's Good About Vias And The Allegro Router? SPB16.3 Has A Few New Enhancements!
By Gerald "Jerry" Grzenia
on June 22, 2010
A few new enhancements specific to vias in the SPB16.3 release of Allegro PCB Editor have been introduced. The are called use via region and stacked via support . Use Via Region Many times you need to restrict usage of specific vias in a region. Allegro...
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Filed under: PCB Layout and routing, PCB design, Allegro PCB Editor, Allegro, via, microvia, PCB Editor, PCB, SPB 16.3, Allegro 16.3, layout, "PCB design", SPB16.3
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What's Good About AMS Simulator And Cursors? You’ll Need The SPB16.3 Release To See!
By Gerald "Jerry" Grzenia
on June 1, 2010
With the SPB16.3 release of AMS Simulator , several new cursor enhancements are available: Setting cursor width and color Placing cursors across multiple traces and plots Exporting and copying cursor data Dockable cursor window Read below to see these...
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Filed under: AMS simulation, SPB, Schematic, AMS simulator, SPB 16.3, AMS, pspice
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What's Good About Browsing For Power Pins in Capture? It's In SPB16.3!
By Gerald "Jerry" Grzenia
on May 25, 2010
The SPB16.3 release of Allegro Design Entry CIS (Capture) now allows you to browse power pins in your design. In Capture, most of the design’s power pins are invisible, which makes it difficult to find power pins. The new "browse power pins"...
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Filed under: Capture CIS, OrCAD Capture, OrCAD, Schematic, Capture-CIS, SPB 16.3, Design Entry, Design Entry CIS, Capture CIS', "capture CIS"
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What's Good About ADW Part Lifecycle? Numerous Improvements in the SPB16.3 Release!
By Gerald "Jerry" Grzenia
on May 20, 2010
The SPB16.3 release of Allegro Design Workbench (ADW) now adds several new key features to the part and model status capabilities. As a part moves through its part lifecycle, ADW provides the ability to control how that part behaves. These new features...
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Filed under: Library and design data management, PCB design, Librarians, Allegro Design Workbench, Library flow, ADW, ADW 16.3
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DDR3 Timing issues? Watch the Allegro PCB SI / TimingDesigner Webinar!
By Team Allegro
on May 17, 2010
Last year, TimingDesigner improved the interface to PCB SI and many of our joint customers have taken advantage of performing static timing analysis on their fully routed boards using the two tools together. However, DDR3 adds a whole ’nother level of...
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Filed under: PCB Signal and power integrity, DDR3, SI, Signal Intregrity, SPB 16.3, Allegro 16.3, PCB SI, IBIS, "PCB design"
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Economic Recovery on the Way to the Airport
By Team OrCAD
on May 13, 2010
Last week, one of the members of TEAMOrCAD took a trip to China. The ride to the airport was provided by one of the local airport transportation service companies. In the course of talking with the driver on their way to the airport, Kevin (the driver...
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Filed under: OrCAD, Schematic, pspice, PCB Capture, "PCB design", "capture CIS"
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What's Good About SCM and Packageable Schematics? The Secret's in the SPB16.3 Release!
By Gerald "Jerry" Grzenia
on May 12, 2010
Many customers want to use System Connectivity Manager (SCM) known as Allegro System Architect (ASA) for quick prototyping and then start using the traditional schematic based PCB design flow. Now with the Export Schematic feature available in the SPB16...
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Filed under: Front-end PCB design, PCB design, Design Entry HDL, Allegro System Architect (ASA), ASA, ConceptHDL, DEHDL, Schematic, SCM, SPB 16.3, Design Entry, Allegro Design Entry
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What's Good About DEHDL Alignment? You’ve got it in the SPB16.3 Release!
By Gerald "Jerry" Grzenia
on May 5, 2010
Schematic construction requires a lot of effort in placing components, wires and text/notes in such a way that the end schematic looks neatly organized. Aligning and distributing objects on a schematic can be time-consuming if it has to be done manually...
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Filed under: Front-end PCB design, SPB, Design Entry HDL, ConceptHDL, DEHDL, Schematic, Component Alignment, SPB 16.3, Allegro 16.3, Design Entry, Allegro Design Entry
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