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PCB Design Blog

What's Good About Capture’s Design Rule Checks? 16.6 Has Several New Enhancements!

The Allegro Design Entry CIS (OrCAD Capture) 16.6 release provides extensions to the Design Rule Checks (DRC) system. The Custom DRC provides the ability to extend the Capture DRC system to user-defined rules. Open an Allegro Design Entry CIS design database...  Read More »
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Customer Support Recommended – Using Test Points in Allegro Design Entry CIS and Allegro PCB Editor Flow

A test point is a location within an electronic circuit that is used to either monitor the state of the circuitry or to inject test signals. Test points have two primary uses: During manufacturing they are used to verify that a newly assembled device...  Read More »
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Create Ideal Solder Mask Openings Around Bond Fingers with Cadence 16.6 IC Packaging Tools

Normal 0 false false false EN-US X-NONE X-NONE Exposing metal through solder mask openings is as necessary as it can be frustrating. For regular arrays and grids of pins of a flip chip, embedding the openings directly in the padstack definition for the...  Read More »
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What's Good About Allegro Design Workbench Team Collaboration? Find Out in the 16.6 Release

The Allegro Design Workbench Team Design Option (TDO) offers two (2) specific integrator roles for team design and collaboration: Logical design integrator Responsible for front-end design Physical design integrator Responsible for back-end design A logical...  Read More »
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DDR4 Power-Aware Signal Integrity Adopting Serial Link Simulation Techniques

The signal integrity (SI) prophets had predicted this time would come, and it turns out they were right. The techniques that SI engineers have been using for the past decade to analyze multi-gigabit serial link interfaces are now starting to be applied...  Read More »
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What's Good About Allegro DEHDL Net Renaming? The Secret's in the 16.6 Release!

Just a brief post this week to mention a new capability for Allegro Design Entry HDL (DEHDL) that was made available in the 16.6-QIR4 release. You can now employ net renaming without loss of data: All instances of the net will be renamed to a new name...  Read More »
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What's Good About Allegro PCB Editor Multiple Constraint Region Assignments? 16.6 Has It!

Just a short post today. In the 16.6 Allegro PCB Editor release, multiple region shapes can now be assigned to a single region constraint object. Using the General Edit Application mode, pre-select multiple region shapes, then use the context-sensitive...  Read More »
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What's Good About Allegro PCB Editor Dual-Side Contact Components? It’s in the 16.6 Release!

The use of dual-sided contact components when placed on internal layers of the PCB allows connections to be made from either side of the device. One of the benefits of using this emerging technology is the reduction of core vias that may have been used...  Read More »
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What's Good About Allegro PCB Editor Design Partitioning? 16.6 Has Several New Enhancements!

The 16.6 release of Allegro PCB Editor has several new enhancements for team design work (design partitioning) that help reduce the number of .DPF (design partition file) import/export iterations the PCB Design team experiences in the physical team design...  Read More »
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What's Good About Allegro PCB Editor IPC 2581 Data Transfer Standard? 16.6 Has It!

The 16.6 Allegro PCB Editor now has IPC 2581 data transfer capabilities. Thanks to Ed Hickey – the Allegro Sr. Product Engineering Manager - for preparing this information below. Read on for more details … IPC 2581 Overview PCBs have changed...  Read More »
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