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Blogs

Sean Dart Q&A: Former Forte CEO Discusses Past, Present, and Future of High-Level Synthesis

Earlier this year Cadence acquired Forte Design Systems , a pioneer of high-level synthesis (HLS) and provider of the Cynthesizer SystemC-based synthesis tool. Sean Dart, Forte CEO since 2006, is now senior group director for R&D at the Cadence System...  Read More »
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Protium FPGA-Based Prototyping Platform – Speeding Bring-Up Times

FPGA-based prototypes provide excellent platforms for pre-silicon software development - but prototype bring-up times are so long and painful that much of the value is lost. Promising to shorten bring-up times by up to 70% versus competing commercial...  Read More »
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EDA Must Think Beyond ICs in Automotive Electronics Market, Panel Says

Autonomous vehicles and automotive electronics represents enormous growth opportunity for EDA vendors but needs a different set of solutions than the industry has traditionally delivered, according to a panel of experts. ...  Read More »
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Ethernet in Cars - The Next Big Thing for Ethernet

Ethernet is coming to cars. Cars now have rear-view cameras and infotainment systems which require video to be transported at a high data rate. Ethernet is the best technology to carry this data. Ethernet celebrated its 40th anniversary in 2013, and has...  Read More »
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Whiteboard Wednesdays - See How Customizable Processors Can Help to Offload Your Apps Processor

In this week's Whiteboard Wednesdays, we take a little different approach and show you a fun and fast way to understand how Cadence® Tensilica® Xtensa® processors work, and how you can easily use them to offload your applications processor...  Read More »
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What's Good About Allegro PCB Editor Dual-Side Contact Components? It’s in the 16.6 Release!

The use of dual-sided contact components when placed on internal layers of the PCB allows connections to be made from either side of the device. One of the benefits of using this emerging technology is the reduction of core vias that may have been used...  Read More »
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Quantus QRC Extraction Solution – Massive Parallelism Extracts Accurate Parasitics Quickly

Over the past 14 months Cadence has brought massive parallelism to static timing analysis ( Tempus Timing Signoff Solution ) and power analysis ( Voltus IC Power Integrity Solution ). Today (July 14, 2014) Cadence is announcing the Cadence Quantus QRC...  Read More »
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Upcoming Webinar: SoC Verification Challenges in the IoT Age

ARM and Cadence host a webinar July 22 to explore how electronics design teams can tackle Internet of Things (IoT) and (SoC) design and verification challenges....  Read More »
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What's Your Summer Engineering Project?

Summer engineering projects can be fun and teach you a lot about yourself you never knew....  Read More »
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EDA Plus Academia: A Perfect Game, Set and Match

Excuse the tennis analogy, but just coming out of Wimbledon! However, EDA and academia have had a long-standing tennis match, if you will, in which there is a "give and take" between the EDA world and the many universities around the world....  Read More »
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