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SKILL for the Skilled: Introduction to Classes -- Part 5
By Jim Newton
on February 10, 2012
In the previous SKILL for the Skilled postings, we looked at a pretty good algorithm for solving the Sudoku puzzle. This algorithm is able to find at least one solution of the puzzle if one exists, and is able to detect that no solution exists if that... Read more »
Filed under: Custom IC Design, Virtuoso, SKILL, Team SKILL, programming, LISP, SKILL++, object orientation, Sudoku
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Things You Didn't Know About Virtuoso: Measurements Across Corners
By Stacy Whiteman
on February 09, 2012
In Virtuoso IC 6.1.5 ISR6, we released a new feature in ADE XL, which had been requested by many customers--the ability to define a measurement expression which operates on the results of another measurement expression across corners. For example, I can... Read more »
Filed under: Custom IC Design, Virtuoso, Virtuoso Analog Design Environment, IC 6.1, ADE-XL, IC 6.1.5, Virtuoso IC6.1.5, custom/analog, Corners analysis, Analog Design Environment, IC615, corners
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Digital and Analog Verification – Round Peg in a Square Hole?
By Richard Goering
on February 09, 2012
Recently I wrote about a panel discussion that looked at ways of bridging the gap between analog and digital design. This blog post resulted in a lengthy discussion in a LinkedIn group that brought up the topic of verification. One commentator noted that... Read more »
Filed under: Industry Insights, DAC, Virtuoso, APS, SoC, verification, IP, Panel, Metric-driven verification, AMS, Functional Verification, Simulation, SPICE, MDV, assertions, Nizic, analog/mixed-signal, coverage, Verilog-AMS, wreal, analog assertions, signoff, Design Automation Conference, LinkedIn, analog verification, digital verification, Virtuoso-APS, real number modeling, Nandra
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Five-Minute Tutorial: Change The Background Color Of EDI
By Kari Summers
on February 08, 2012
Today's tutorial could probably be called a One-Minute Tutorial, since it's so quick. This is something that came across our internal expert alias, and I figured it's something that most people may not know about. Did you know that you can... Read more »
Filed under: Digital Implementation, encounter, EDI, five minute tutorial, background color, changing color, color
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The Zynq Virtual Platform: Not Just for Pre-Silicon
By Jason Andrews
on February 07, 2012
One of the biggest misconceptions about Virtual Platforms is that they are only useful for pre-silicon software development, and once a chip and board is ready they are quickly discarded. Even after boards are available, Virtual Platforms are valuable... Read more »
Filed under: embedded software, linux, SystemC, virtual platforms, virtual prototypes, Virtual System Platform, Zynq, Zynq-7000', Watchdog Timer, pre-silicon, post-silicon
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What's Good About Property Changes in DEHDL? The Secret's in the 16.5 Release!
By Gerald "Jerry" Grzenia
on February 07, 2012
In the 16.5 release, all connectivity changes are stored in the hierarchical block directly in Design Entry HDL (DEHDL). Connectivity changes are basically additions or modifications of components, nets, and pin-net connections. The behavior remains the... Read more »
Filed under: Design Entry HDL, ConceptHDL, Constraint Manager, Allegro, Schematic, PCB, Design Entry, Allegro Design Entry, design, SPB16.5, Allegro 16.5, hierarchy, hierarchical schematics, flat schematics, electrical constraints, uprev, property changes
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