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Whiteboard Wednesdays—How to Verify SoCs Incorporating the M-PCIe Specification
By Corrie Callenbach on September 02, 2014
In this week's Whiteboard Wednesdays video, Mukul Dawar provides an overview of the Mobile PCIe (M-PCIe™) specification. He explains how Cadence VIP for M-PCIe can help you verify your mobile SoC design.... Read more »
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Objection Mechanism Synchronization Between SystemVerilog and e Active Verification Components
By Team Specman on September 02, 2014
What happens when you have two verification components (for example one implemented in e and the other in System Verilog) and one of the frameworks drops its last TEST_DONE objection?... Read more »
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Virtuosity: 20 Things I Learned in July and August 2014 by Browsing Cadence Online Support
By Stacy Whiteman on September 02, 2014
Highlights from July and August 2014 for resources related to Cadence Virtuoso and other electronics design tools. ... Read more »
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Expectations Versus Reality — How I Misjudged the Apple MacBook Pro Retina Display
By Axel Scherer on September 02, 2014
The Retina display in the Apple MacBook Pro has much more value than I originally expected. As similar observatiom is being made about the Incisive debug Analyzer.... Read more »
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Electromigration – What IC Designers Need to Know
By Richard Goering on September 01, 2014
If a chip that was previously working fails in the field, the impact could range from a minor nuisance (for a disposable consumer product) to a major tragedy (for a pacemaker or automobile safety system). That's why reliability is so important in... Read more »
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IoT Focus: Wrestling with the Design, Time to Market, and Cost Challenges of IoT
By Seow Yin Lim on August 28, 2014
Winning in the IoT applications space requires a system-level design mentality and an abiding insight into energy, cost and time-to-market challenges.... Read more »
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