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Strengthen Your Plane-to-Plane Connections with Cadence 16.6 IC Package Shorting Via Arrays
By Jeffrey Gallagher on July 31, 2014
Manufacturability and quality of the power and ground feeds for your package are always a big concern for all of us. When you have multiple plane layers, connecting them together with reinforcing vias is a great idea, with just one problem: how do you... Read more »
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FinFETs, Advanced Process Nodes, and Parasitic Extraction
By Brian Fuller on July 31, 2014
Cadence's Hitendra Divecha talks about advanced-node and FinFET design challenges and how to manage parasitic extraction.... Read more »
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Designer View – How Emulation/Virtual Prototyping “Hybrid” Speeds Software Development
By Richard Goering on July 31, 2014
200X. That's the number with which Moshe Berkovich, senior engineer at fabless semiconductor provider CSR , started a 15-minute talk that is now a recorded presentation on Cadence.com. And 200X is the performance improvement that his team was able... Read more »
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New VIP RAKs Help in Learning Integration of Ethernet GMII and M-PCIe into SystemVerilog and UVM Environments
By Sumeet Aggarwal on July 30, 2014
There is always a demand for learning something simply and quickly on your own in some corner of the world. The big challenge that I have faced with learning is how to find the right learning vehicle that helps me discover what I didn't already know... Read more »
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What's in Store for the Electronics Industry in 2H 2014?
By Brian Fuller on July 29, 2014
The electronics industry outlook for the second half of 2014 is looking more bullish than expected, thanks in part to the coming launch of the Apple iPhone 6.... Read more »
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Whiteboard Wednesdays - Defining Different Types of USB Controllers
By Corrie Callenbach on July 29, 2014
In this week's Whiteboard Wednesdays, Jacek Duda takes a closer look at different types of USB controllers and their roles in today's devices.... Read more »
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