Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Share

  • Email
  • Social Web
* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Community

 
IBM/Cadence Collaboration Points To “Next Generation” EDA
By Richard Goering on February 08, 2010
Embedded software development and hardware/software integration have become primary bottlenecks for system-on-chip (SoC) projects. Still, most EDA tools remain exclusively focused on hardware design, while software development tools have no understanding... Read more »
Comments (0)
 
Filed under: , , , , , ,
 

 
An Analogy: UVM Is To OVM As SystemVerilog Is To Verilog
By Tom Anderson on February 05, 2010
In my last blog entry , I implored Accellera to release UVM 1.0 quickly, standardizing OVM 2.1 as is, with full backwards compatibility and without trying to cram overlapping functionaity from VMM into the base. Then they can add new functionality on... Read more »
Comments (5)
 
Filed under: , , , , , , ,
 

 
DesignCon Panel: “Total” IP Solutions Fuel SoC Integration
By Richard Goering on February 05, 2010
Panelists at DesignCon Feb. 3 agreed that just shipping RTL code for silicon IP is far from sufficient. But what comprises a “total” IP solution for SoC integration? That’s a little more complicated, and it fueled a good discussion with... Read more »
Comments (2)
 
Filed under: , , , , , , ,
 

 
Tech Tip: Easy Way To Re-Run Using The Same Seed
By Team Specman on February 05, 2010
[Team Specman welcomes back Application Engineer Hilmar Van Der Kooij as this week’s guest blogger] Often we want to re-run a simulation with the exact same random seed that was used in the previous one. Unfortunately far too many people (ok, maybe... Read more »
Comments (0)
 
Filed under: , ,
 

 
What's Good About DEHDL Font Support? The Secret's in The SPB16.3 Release!
By Gerald "Jerry" Grzenia on February 04, 2010
Well - it's here! Native font support in Allegro Design Entry HDL (DEHDL)! This has been a often requested feature and is particularly important for our mil-aero customers. The DEHDL environment has conventionally provided support for vector fonts... Read more »
Comments (0)
 
Filed under: , , , , ,
 

 
Apple A4: What We’ve Heard, What We Can Learn
By Richard Goering on February 03, 2010
The big mystery behind the recent Apple iPad announcement is the A4 processor that powers this touchscreen, “tablet” PC. What’s in it, and why did Apple design its own system-on-chip (SoC) as opposed to using off-the-shelf hardware?... Read more »
Comments (3)
 
Filed under: , , , ,
 

 
View all blog posts »
Visit the community forums »

There are 70 guest(s) and 1 member(s) online:
vmark

Most Active Users


Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.