Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Community

Visit the User forums »
There are 244 guest(s) and 0 member(s) online:


 
What's Your Summer Engineering Project?
By Brian Fuller on July 09, 2014
Summer engineering projects can be fun and teach you a lot about yourself you never knew.... Read more »
Comments (0)
 
Filed under: , , , ,
 

 
EDA Plus Academia: A Perfect Game, Set and Match
By Steven Lewis on July 08, 2014
Excuse the tennis analogy, but just coming out of Wimbledon! However, EDA and academia have had a long-standing tennis match, if you will, in which there is a "give and take" between the EDA world and the many universities around the world.... Read more »
Comments (0)
 
Filed under: , , , , ,
 

 
Whiteboard Wednesdays - Verifying Solid State Drives Incorporating NVM Express
By Corrie Callenbach on July 08, 2014
In this week's Whiteboard Wednesdays, Mukul Dawar explains the NVM Express protocol and considerations to keep in mind when using verification IP to perform functional verification.... Read more »
Comments (1)
 
Filed under: , , , , ,
 

 
IP Talks! Keynote at DAC 2014—Rethinking Image Processing in SoC Design
By Richard Goering on July 07, 2014
Many systems on chip (SoCs) have a "camera block" or image signal processor (ISP) that takes raw data from an image sensor and manipulates that data. But ISPs are moving away from their traditional role and turning into "vision subsystems... Read more »
Comments (0)
 
Filed under: , , , , , ,
 

 
Virtuosity: 21 Things I Learned in May and June 2014 by Browsing Cadence Online Support
By Stacy Whiteman on July 03, 2014
Application Notes 1. Setting PVS to QRC av_extracted Flow with tsmc28 (& tsmc40 ) LVS Shows you how to put in place the PVS(LVS)-QRC(av_extracted) view using TSMC files. Videos 2. Mismatch Contribution in Virtuoso Analog Design Environment GXL Mismatch... Read more »
Comments (0)
 
Filed under: , , , , , , , , , ,
 

 
Semiconductor Industry Outlook: Enormous Opportunity, Says Jaswinder Ahuja
By Brian Fuller on July 02, 2014
Jaswinder Ahuja, Corporate Vice President and Managing Director, Cadence India, describes the semiconductor industry opportunity in IoT, wearables and mobile applications. ... Read more »
Comments (1)
 
Filed under: , , , , , , , , ,
 

 
View all blog posts »


Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.