Freescale SemiconductorAnis Jarrar
Freescale Semiconductor
Anis Jarrar, Principal Design Engineer, at Freescale Semiconductor describes how they utilized the Cadence Low-Power Solution to design and implement the complex Kinetis SoC. |
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Freescale Semiconductor |
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BIOTRONIKDavid Genzer
BIOTRONIK
David Genzer, Director of IC Development at BIOTRONIK describes how they leveraged the Cadence digital implementation and signoff flow and CPF-enabled low-power solution to help deliver the most advanced and sophisticated pacemaker product on the market. |
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Global Unichip Corporation (GUC)Alex Kuo
Global Unichip Corporation (GUC)
Alex Kou, Senior Design Manager at Global Unichip Corporation, highlights how the CPF enabled Cadence Low Power Solution helps them achieve 100+ low power design tape-outs and address their low power design challenges in future technology nodes. |
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NVIDIA
Narendra Konda
NVIDIA
Narendra Konda, Director of Hardware Engineering at NVIDIA, outlines how the Cadence System Development Suite helps his design team successfully integrate complex hardware and software, develop app-ready systems more quickly, and ultimately improve the overall quality and competitiveness of their products. |
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