射频设计 

电路设计 对RF设计非关键方面进行有选择的自动设计使工程师能够集中精力于设计中的精密工艺部分。Cadence®电路设计解决方案支持快速准确的设计概念输入，包括以自然融入原理图的方式管理完整的设计意图。使用先进的寄生参数预知的环境，设计师能够看到并了解模拟、RF或混合信号设计之间的多种相关性，从而创建并验证相应的无源元件。

Virtuoso Analog Design Environment

Provides a comprehensive array of capabilities for electrical and statistical analysis, verification, and optimization of analog/mixed-signal designs, including the interfaces to many industry-standard simulators.

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Virtuoso Schematic Editor

Provides a complete design and constraint composition environment for front-to-back analog, custom-digital, RF, and mixed-signal designs.

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RF模块仿真 创建目前领先技术的设计需要快速、可靠的RF仿真和分析。Cadence® RF模块仿真技术包括了市场上唯一能够满足RF设计的整个频谱需求的RF仿真器，。它提供频域的谐波平衡引擎，可实现速度更快且准确度更高动态范围更广的RF电路仿真。它还利用获得专利的时域shooting算法，优化用于高度非线性电路。

Virtuoso Accelerated Parallel Simulator

Delivers scalable performance and capacity at full Spectre-level accuracy across a broad range of complex analog, RF, and mixed-signal blocks and subsystems.

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Virtuoso Analog Design Environment

Provides a comprehensive array of capabilities for electrical and statistical analysis, verification, and optimization of analog/mixed-signal designs, including the interfaces to many industry-standard simulators.

了解更多 »

Virtuoso Spectre Circuit Simulator

Delivers a fast, SPICE-accurate simulator for challenging analog, RF, and mixed-signal circuit simulation and device characterization.

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Virtuoso Multi-Mode Simulation

Enables comprehensive design and verification by linking the industry’s leading simulation engines for seamless simulation throughout the design cycle.

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系统级模拟 工程师需要完整的流程—从系统级设计到版图设计之后的验证，它集成了RF系统级电路仿真和混合信号基带设计。Cadence®技术提供了用于RF和数字区块灵活的系统级仿真，支持在数字环境中进行RF模块验证。带有数据流仿真器的协同仿真功能使系统设计师能够探查系统架构中非理想电路的效果。

Virtuoso Analog Design Environment

Provides a comprehensive array of capabilities for electrical and statistical analysis, verification, and optimization of analog/mixed-signal designs, including the interfaces to many industry-standard simulators.

了解更多 »

Virtuoso AMS Designer

Provides an advanced mixed-signal simulation solution for design and verification of analog, RF, memory, and mixed-signal SoCs.

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Virtuoso Multi-Mode Simulation

Enables comprehensive design and verification by linking the industry’s leading simulation engines for seamless simulation throughout the design cycle.

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版图设计 为了实现RF设计，工程师需要在器件级、元件级和模块级对定制的混合信号和模拟电路提供的全面支持。Cadence®版图设计解决方案能够自动化并加速定制电路模块创建，提供了多种先进的功能，可用于器件板图生成和编辑、模块布局规划、自动布局和交互布线等。

Virtuoso Layout Suite

Provides the complete physical layout environment of the industry-standard Virtuoso custom design platform, a comprehensive solution for front-to-back custom-analog, digital, RF, and mixed-signal design.

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寄生参数提取 在版图设计之后，RF设计师必须回到设计中提取寄生参数，并执行另一轮的仿真，以确定将会导致出现问题的寄生参数效应。Cadence®寄生参数提取解决方案使设计者能够轻松获得设计中所有寄生参数效应的整体视图，然后通过实时标记违规情况以便快速进行更正。

Cadence QRC Extraction

Performs 3D full-chip parasitic extraction on all design style and flows. Delivers the fastest convergence on design goals.

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可制造性验证 在今天现金的工艺节点下，RF设计软件必须考虑更小的晶体管，更细的走线，更密集的布局，更大规模的集成度所带来的挑战。Cadence可制造性解决方案把芯片是如何制造的以及产生掩模板的知识，引入到芯片设计阶段，帮助工程师在芯片流片之前，对制造过程中可能产生的物理效应进行补偿设计，从而提供一种可靠的方法来保证可制造性的验证。

Cadence Litho Physical Analyzer

Detects and corrects lithography hotspots. Uses a model-based technology to predict silicon contours quickly and accurately. Improves parametric yield and chip performance.

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Cadence Litho Electrical Analyzer

Extracts device and interconnect electrical behavior from contours. Detects and repairs timing and leakage hotspots due to systematic variations.

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Cadence Physical Verification System

Offers a front-to-back design, implementation, and signoff flow in a single solution. Speeds turnaround of design-rule check and layout vs. schematic verification.

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Virtuoso Layout Migrate

Offers rapid physical layout migration, including support for complex design rules at advanced nodes.

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Virtuoso Layout Suite

Provides the complete physical layout environment of the industry-standard Virtuoso custom design platform, a comprehensive solution for front-to-back custom-analog, digital, RF, and mixed-signal design.

了解更多 »

Virtuoso Analog Design Environment

Provides a comprehensive array of capabilities for electrical and statistical analysis, verification, and optimization of analog/mixed-signal designs, including the interfaces to many industry-standard simulators.

了解更多 »

Assura Physical Verification

Performs design-rule checking and layout vs. schematic verification to deliver high-yielding custom IP for SoC designs.

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Assura Physical Verification

Performs design-rule checking and layout vs. schematic verification to deliver high-yielding custom IP for SoC designs.

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Cadence Litho Electrical Analyzer

Extracts device and interconnect electrical behavior from contours. Detects and repairs timing and leakage hotspots due to systematic variations.

了解更多 »

Cadence Litho Physical Analyzer

Detects and corrects lithography hotspots. Uses a model-based technology to predict silicon contours quickly and accurately. Improves parametric yield and chip performance.

了解更多 »

Cadence Physical Verification System

Offers a front-to-back design, implementation, and signoff flow in a single solution. Speeds turnaround of design-rule check and layout vs. schematic verification.

了解更多 »

Cadence QRC Extraction

Performs 3D full-chip parasitic extraction on all design style and flows. Delivers the fastest convergence on design goals.

了解更多 »

Cadence RF Design Methodology Kit

Delivers verified methodologies packaged in a system-to-tapeout RFIC design flow, demonstrated on a segment representative design.

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Virtuoso Accelerated Parallel Simulator

Delivers scalable performance and capacity at full Spectre-level accuracy across a broad range of complex analog, RF, and mixed-signal blocks and subsystems.

了解更多 »

Virtuoso AMS Designer

Provides an advanced mixed-signal simulation solution for design and verification of analog, RF, memory, and mixed-signal SoCs.

了解更多 »

Virtuoso Analog Design Environment

Provides a comprehensive array of capabilities for electrical and statistical analysis, verification, and optimization of analog/mixed-signal designs, including the interfaces to many industry-standard simulators.

了解更多 »

Virtuoso Analog Design Environment

Provides a comprehensive array of capabilities for electrical and statistical analysis, verification, and optimization of analog/mixed-signal designs, including the interfaces to many industry-standard simulators.

了解更多 »

Virtuoso Layout Migrate

Offers rapid physical layout migration, including support for complex design rules at advanced nodes.

了解更多 »

Virtuoso Layout Suite

Provides the complete physical layout environment of the industry-standard Virtuoso custom design platform, a comprehensive solution for front-to-back custom-analog, digital, RF, and mixed-signal design.

了解更多 »

Virtuoso Multi-Mode Simulation

Enables comprehensive design and verification by linking the industry’s leading simulation engines for seamless simulation throughout the design cycle.

了解更多 »

Virtuoso Schematic Editor

Provides a complete design and constraint composition environment for front-to-back analog, custom-digital, RF, and mixed-signal designs.

了解更多 »

Virtuoso Spectre Circuit Simulator

Delivers a fast, SPICE-accurate simulator for challenging analog, RF, and mixed-signal circuit simulation and device characterization.

了解更多 »