登录
|
注册
|
资源库
|
全球网站
亚太
|
美国总部
|
欧洲
|
印度
|
以色列
|
日本
|
韩国
|
台湾
|
全球范围办公室查找
解决方案
公司产品
技术服务
培训与支持
产业联盟
社区(英文)
关于Cadence
解决方案
设计 IP
混合信号
低功耗设计
先进工艺节点设计
企业验证
托管设计
系统开发套件
解决方案主页
产品
系统级设计与验证
功能验证
逻辑设计
数字实现
定制设计
射频设计
PCB设计
IC封装与SiP设计
可制造性签收
更多产品
OrCAD产品
设计 IP
Cadence VIP 目录
IP 目录
所有产品目录
产品主页
能力与实践
设计方法学服务
设计服务
TSMC与Cadence DFM服务协作
教育服务
计划
SOI设计中枢
VCAD
服务主页
支持与服务
支持内容
支持流程
Cadence在线支持
软件下载
计算平台支持
大学软件计划
培训
培训内容
培训课程目录
全球培训中心
支持和培训主页
产业联盟
系统实现联盟
芯片代工厂计划
IP联盟
ChipEstimate.com - 芯片规划门户
Connections计划
验证联盟计划
渠道伙伴计划
功率促进联盟
标准和语言
PCB Service Bureaus
行业会员
产业联盟主页
用户社区
系统级设计与验证
功能验证
逻辑设计
数字实现
定制设计
射频设计
PCB设计
IC封装与SiP设计
可制造性签收
快速链接
所有博客
所有论坛
社区搜索
CDN
Live!
客户会议
社区主页
新闻与活动
新闻报道
最新活动
中国季风
客户成功案例
多媒体中心
公司信息与资源
Cadence研究实验室
社区参与
就业机会
联系我们
关于Cadence主页
Home
>
Cadence 中国
>
公司产品
> PCB 设计成功案例
Share
Email
Social Web
*
Required Fields
Recipients email
*
(separate multiple addresses with commas)
Your name
*
Your email
*
Message
*
Send yourself a copy
Subscribe
RSS
Cadence RSS Feeds
Cadence Press Releases
System Design and Verification Blog
Functional Verification Blog
Digital Implementation Blog
Custom IC Design Blog
RF Design Blog
PCB Design Blog
IC Packaging and SiP Design Blog
Manufacturability Signoff Blog
All Blogs
System Design and Verification Forum
Functional Verification Forum
Digital Implementation Forum
Custom IC Design Forum
Custom IC SKILL Forum
Logic Design Forum
RF Design Forum
PCB Design Forum
PCB SKILL Forum
IC Packaging and SiP Design Forum
Manufacturability Signoff Forum
Intro copy of the newsletter section here, some intro copy of the newsletter. Instruction of how to subscribe to this newsletter.
Contact Us
Cadence Contacts
Community Relations
Customer Support
Employment
Investor Relations
Media Relations
Training
Global Office Locator
Find Offices worldwide
»
Sales Inquiry
Request for Product information
»
Cadence Channel Partners
»
Corporate Headquarters
Cadence Design Systems, Inc.
2655 Seely Avenue
San Jose, CA 95134
Phone: 408.943.1234
*
Required Fields
First Name
*
Last Name
*
Email
*
Company / Institution
*
Comments:
*
Send Yourself A Copy
PCB 设计
Bayside Design Inc
Design Challenge
Develop a complete evaluation system for 6.5-Gbps SerDes design, including package, board, FPGA, and software for debug
Complete project in eight weeks
Cadence Solution
Upgraded design environment with Cadence Allegro® system interconnect design platform
Read Full story
»
Huawei Technologies
Design Challenge
Create a next-generation basestation that incorporates extensive new technologies and significant mixed-signal design challenges
Reduce design cycle and improve productivity
Cadence Solution
Provided custom radio frequency (RF) printed circuit board (PCB) module for Cadence Allegro® system interconnect design platform
Created an environment that allowed Huawei to complete their entire PCB design within the Allegro platform
Read Full story
»
IBM
Design Challenge
World's most complex PCBs
Large designs, multiple wide buses
High component pin counts and thousands of board connections
Cadence Solution
Integrated platform—from input to final design
Tabular input of signal information for faster compilations
Read Full story
»
JDSU
Design Challenge
Pin assignment for multiple FPGAs on a new optical network tester board
High-density, multi-port design with 5,500 components and stringent communications requirements
4,596 high-speed nets with constraints
Cadence Solution
Cadence Allegro FPGA System Planner
Cadence Allegro Global Route Environment
Read Full story
»
Liquid Computing Corporation
Design Challenge
Accelerate design schedule for complex high-speed board design to meet critical market window
Adopt an front-to-back high-speed board design methodology to maximize productivity
Cadence Solution
Deployed the Cadence® Allegro® system interconnect design platform
Enabled a high-speed board design methodology that allowed the Liquid Computing team to accelerate their process to meet their schedule
Read Full story
»
Marconi Communications
Design Challenge
Migrate to a new PCB design environment with advanced board design methodologies
Translate INCASES libraries to new platform
Cadence Solution
Provided complete assessment and translation of EDA library infrastructure
Trained team on new platform
Read Full story
»
NVIDIA
Design Challenge
Having HDI design capabilities in a constraint-driven PCB design flow
Driving micro vias quickly and accurately
Reducing the number of layers on customers’ boards
Shortening the PCB layout design cycle
Cadence Solution
High-speed constraint-driven HDI flow to shorten the design cycle while adhering to high-speed rules
Mitigate risk, boost performance, and increase efficiency with a set of proven, unified PCB design, layout, editing, and routing technologies
Collaboration with NVIDIA engineers to streamline time to productivity with the enhanced flow
Read Full story
»
Nvidia
Greg Bodi
Nvidia
Greg Bodi, System Design Senior Manger at Nvidia talks about Allegro PCB products.
Tait Electronics
Design Challenge
Translate legacy UniCAD designs to Cadence Concept® HDL and Allegro® formats
Reduce design cycle time
Cadence Solution
Customized translators and converted libraries from UniCAD to Cadence
Customized Cadence Allegro platform to meet customer design needs
Read Full story
»
VeriSilicon
Design Challenges
Accelerate the design process with automated, placement-aware pin assignment
Optimize the physical connectivity, even as it changes
Ensure quality and reduce complexity with reuse of interface rules and protocols
Cadence Solution
Allegro FPGA System Planner XL
Read Full story
»
Content Query Web Part [2]
Register today for Free PCB and IC Packaging Webinars
New Allegro 16.5 Release: Productivity-enhancing capabilities and flexible product configurations
Printed Circuit Design & Fab: A Conversation on Design Planning with Pete Waddell
FPGA-PCB codesign; a 21st Century approach to integrating fpgas into the pcb design process
speakTECH Feeder Viewer for Community Server
Recent Blog Posts
What's Good About APD’s Wirebond Color Visibility? You’ll Need the 16.5 Release to See!
What's Good About Allegro GRE 2 Point Flow? It’s in the 16.5 Release!
What's Good About Allegro PCB Router HDI Capabilities? 16.5 Has a Few New Enhancements!
Visit the Community
»
Content Query Web Part [3]
Allegro Downloads
Cadence Services
Support & Training
Software Downloads
Service Bureaus
Technical papers