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逻辑设计 

78 resources found
 
Title Type Rated
Encounter DFT Architect Datasheet
Format: .PDF (1.4MB)    Date: 18 Apr 2012
 		Datasheet
 8
Recommend!
Encounter True-Time ATPG Datasheet
Format: .PDF    Date: 18 Apr 2012
 		Datasheet
 13
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Encounter RTL Compiler Datasheet
Format: .PDF    Date: 29 Mar 2012
 		Datasheet
 12
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Encounter RTL Compiler Compiler Advanced Physical Option Datasheet
Format: .PDF    Date: 29 Mar 2012
 		Datasheet
 12
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Encounter Timing System Datasheet
Format: .PDF (1.4MB)    Date: 16 Feb 2012
 		Datasheet
 16
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Clock Concurrent Optimization Technical Paper
Date: 27 Jan 2012
 		Technical Paper
 1
Recommend!
3D ICs with TSVs—Design Challenges and Requirements White Paper
Format: .PDF    Date: 20 Dec 2011
 		White Paper
 9
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Eliminating Routing Congestion Issues with Logic Synthesis White Paper
Format: .PDF    Date: 15 Dec 2011
 		White Paper
 6
Recommend!
Encounter Diagnostics Datasheet
Format: .PDF (1.4MB)    Date: 14 Dec 2011
 		Datasheet
 7
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Encounter Conformal Constraint Designer Datasheet
Format: .PDF    Date: 01 Nov 2011
 		Datasheet
 8
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Cadence DFM services Datasheet
Format: .PDF (1.5MB)    Date: 11 Oct 2011
 		Datasheet
 9
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Encounter Conformal ECO Designer Datasheet
Format: .PDF    Date: 01 Sep 2011
 		Datasheet
 12
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Encounter Conformal Low Power Datasheet
Format: .PDF    Date: 31 Mar 2011
 		Datasheet
 6
Recommend!
Practical application of high-level synthesis in SoC designs on-demand webinar
Date: 08 Dec 2010
 		Webinar
 2
Recommend!
Encounter Conformal Equivalence Checker Datasheet
Format: .PDF    Date: 29 Nov 2010
 		Datasheet
 2
Recommend!
EDA360: The Way Forward for Electronic Design
Date: 27 Apr 2010
 		Other
 4
Recommend!
Cadence NewsLink - Issue 5
Date: 28 Sep 2009
 		Newsletter
 2
Recommend!
Cadence Chip Planning System Datasheet
Format: .PDF    Date: 25 Sep 2009
 		Datasheet
 8
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Archived webinar - How Logic Designers Can Avoid Congestion Nightmares
Date: 24 Sep 2009
 		Webinar
 0
Recommend!
Logic Design Webinar Series
Date: 17 Sep 2009
 		Webinar
 1
Recommend!
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