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Conference Agenda - Tuesday Marc
Conference Agenda - PCB & IC Packaging Tracks   
  View agenda for: General Sessions   
Tuesday March 12

8:00am - 9:00am Registration / Breakfast  

9:00am - 9:50am
Track 8
PCB		 Track 9
IC Packaging/Sigrity
PCB101
How to Create High Quality Schematics Using OrCAD
Intersil 		ICSIG101
Amkor Virtual Designer
Amkor Technology

10:00am - 10:30am BREAK  

10:30am - Noon KEYNOTE SPEAKERS
Lip-Bu Tan
President and Chief Executive Officer, Cadence
Young Sohn
President & Chief Strategy Officer, Samsung Electronics
Martin Lund
Sr. Vice President, Research & Development, SoC Realization Group, Cadence
  

Noon - 1:30pm LUNCH / EXPO  

1:30pm - 2:20pm  
PCB102
Update on Efficient ECAD-MCAD Co-Design Using EDMD (IDX) Format
Cadence 		ICSIG102
Lead Frame Package Design Flow Using CDS Electronic Package Designer (EPD) and Cadence Chip/Package design tools
Analog Devices

2:30pm - 3:20pm  
PCB103
OrCAD Capture Team Design
EMA Design Automation 		ICSIG103
Silicon-Package Co-Design for a High Performance SerDes IP Test Chip
Bayside Design, Inc

3:20pm - 3:45pm BREAK  

3:45pm - 4:35pm  
PCB104
Allegro PCB Supercharger – Video Performance, Linux and Virtualization
Sedona International 		ICSIG104
Breaking Down Auto-router Barriers – An in Depth Look Into Advancements in Package Auto-routing
Amkor Technology

4:45pm - 5:35pm  
PCB105
Defining PCB Build Intent with your fabrication partner using IPC-2581
Cisco		 ICSIG105
Design Rule Verification using RAVEL
Amkor Technology

Wednesday March 13

8:30am - 8:45am Welcome Address  

8:45am - 9:30am
Track 9
PCB		  
PCB202
OrCAD Product Update
Cadence 		 

9:30am - 10:15am
PCB203
Allegro Product Update
Cadence 		 

10:15am - 10:30am BREAK  

10:30am - 11:15am
PCB204
PCB & IC Packaging Signal Integrity Product Update
Cadence 		 

11:15am - 11:45am
PCB205
IC Packaging Product Update
Cadence 		 

11:45am - 12:15pm
PCB206
Q&A Roundtable with Engineering - Cadence R&D
Cadence 		 

12:15pm - 1:00pm Lunch with Cadence PCB & ICP Team  

1:00pm - 3:00pm  
PCB301
Latest Developments in Routing Technology
Cadence 		PCB401
Power Aware SI
Cadence

3:00pm - 5:00pm  
PCB302
OrCAD Apps
Cadence 		PCB401 (Continued)
Power Aware SI
Cadence

NOTE: Agenda is subject to change.