CDNLive! India, November 18 - 19 in Bangalore, brought together over 650 Cadence® technology users, developers, industry experts, professors, and students to educate and energize at the premier technology conference in the India region. For the first time, CDNLive! featured two distinct conferences – a University Conference aimed specifically at Cadence’s university customers, and an Industry Conference for its corporate customers.

CDNLive! University Conference on November 18

Jaswinder Ahuja felicitates keynote speaker A Vasudevan from Wipro at CDNLive! India 2009 University Conference

For the past four years Cadence has been holding a design contest for students of universities that use Cadence technologies. The winner and runner-up of the Cadence Design Contest 2009 were invited to speak about their projects – IIT Delhi presented their winning project “Design of Low-Power and High-Performance Ternary Content Addressable Memory (T-CAM)” and runners-up BVB College of Engineering, Hubli, presented their project “Control Scheme for 1.8V, 2MHz Buck Converter Using Type II PI Controller.”

The winning team of the Cadence Design Contest 2009, IIT Delhi, with the Expert Committee members, Jaswinder Ahuja and Rahul Arya.

Making sure that students are ready to enter today’s competitive job market is a challenge for both students and faculty. What is industry looking for in fresh graduates? How can faculty help in preparing students while they are studying? The conference featured a lively panel discussion that presented various aspects of getting students industry-ready –some of the issues discussed were the need for technical skills, the right attitude, a thirst for learning, soft skills, etiquette and IP awareness. The panelists included industry veterans S N Padmanabhan, senior vice president, Mindtree, Anand Bariya, managing director, Netlogic Microsystems and Joe Lazar, HR director, Analog Devices, as well as noted academician Dr C R Venugopal, professor at SJCE Mysore and chairman of the Board of Studies, VTU. The panel was moderated by Dr C P Ravikumar, director of university relations, Texas Instruments.

The day ended with two in-depth techtorials – one on Low Power by Dr Mladen Berekovic from IDA Germany and the other on system-in-package (SIP) design by Saugat Sen and Ashish Mathur, Cadence Design Systems India.

CDNLive! Industry Conference on November 19

The tracks were Custom IC, Digital IC, Front End Design, Verification and PCB & IC Packaging Design. Engineers from the following companies presented papers - ARM, CDAC, Cisco Systems, Freescale, IBM, Kamal Elektronix, LSI Research, Motorola Penang, NXP, Rambus, Sandisk, Sonic Chips, ST Microelectronics, Tessolve, Texas Instruments, Wipro, and Xilinx.

Keynotes by Lip-Bu Tan, president and CEO, Cadence Design Systems, Inc. and Dr Biswadip Mitra, president and managing director, Texas Instruments India

The keynote speakers Prof Anil Gupta and Lip Bu Tan (3rd and 4th from left respectively) with the panelists and Jaswinder Ahuja at the Economic Times/Cadence executive event.

He also mentioned that those companies who are most capital efficient and leverage the ecosystem will be better positioned to succeed. These companies leverage the specialization of others and focus on their own differentiating expertise or IP.

Dr Biswadip Mitra, president and managing director of Texas Instruments India, was the guest keynote speaker and he spoke about the criticality of infrastructure as the building block of India’s acceleration towards being an “emerged” economy. This has several facets – communications, telecom, energy, security and surveillance, and education. Electronics has a vital role to play in each of these areas, and this is a tremendous opportunity for Indian companies. Dr Mitra spoke about the need to leapfrog to lead in the technology infrastructure. As an example, he pointed out that in the area of telecommunications there are a large number of consumers in India who have leapfrogged from no phone to mobile phone.

Lip Bu Tan felicitates guest keynote Dr Biswadip Mitra from Texas Instruments at the Industry Conference keynote ceremony

Dr Mitra also spoke about the potential of energy, lighting, medical electronics and automotive applications where there are great opportunities for electronics to make a huge difference. Semiconductor companies need to partner with OEMs and existing systems companies to take advantage of these unique opportunities and to co-innovate, he said.

Technology Challenges Addressed

In the Verification track sessions covered the overall challenge of conceptualization to implementation, IP reuse, hardware / software validation, power aware design verification, and as well as other challenges of verifying highly complex designs.

In the Digital IC track attendees heard about dealing effectively with power issues, DFM challenges at low process nodes, and achieving predictability in timing and signal integrity closure of their designs.

In the Custom IC track, sessions discussed floorplanning for mixed signal design using Open Access, custom layout, AMS verification, power grid sign off, and fast and accurate Spice simulation.

In the Front End Design track, sessions focused on Engineering Change Orders (ECOs) and their impact on the design process, low power challenges in the front end flow, advanced formal verification challenges, and architectural exploration.

In the PCB & IC Packaging track examined packaging trends and challenges, SIP solutions, library development and conversion, and signal integrity issues.

Other highlights

The worldwide sponsors for CDNLive! were ARM, Common Platform and TSMC and the media sponsor was EETimes India.

Best Paper Awards

• Digital IC
  Enabling SOI Technology Designs Signal Integrity Closure Using Cadence Flow Solutions
  Freescale Semiconductor
• Custom IC
  OSS-Based AMS Netlister Using irun: A New and Effective Methodology for Mixed-Signal Verification
  PMC Sierra
• Verification
  Leveraging Different Verification Approaches and Technologies
  Rambus Chip Technology
• Front End Design
  Challenges and Best Practices Using LEC-ECO
  Texas Instruments
• PCB & IC Packaging Design
  Package Design Challenges and Power Bussing Techniques
  Cisco Systems

For questions regarding CDNLive! India 2009, email cdnlive_india@cadence.com.

2008 Conference Highlights

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