Kawasaki Micro Improves Timing, Area, Power of ASICS with Cadence SynthesisCadence Synthesis Enhanced Over 30 Production Tapeouts of ASIC Chips at K-MicroSAN JOSE, Calif., 08 Nov 2005
Kawasaki Microelectronics, Inc. of Japan (K-Micro) and Cadence Design Systems, Inc. (NASDAQ: CDN) today announced that K-Micro has completed more than 30 production tapeouts of ASIC chips with Cadence® Encounter® RTL Compiler global synthesis, a key technology of the Encounter digital IC design platform. Encounter RTL Compiler achieved greater than a 10 percent timing improvement, a reduction in area of up to 20 percent, and lower power consumption due to area reduction over previously used methodology.
K-Micro, a leader in developing and marketing advanced ASIC semiconductor technology solutions, also used the Encounter platform for physical implementation. The company's core technologies and design support are used in the consumer-electronics, computer, office-automation, networking, wireless, and electronic-storage markets.
"Since we started to use Encounter RTL Compiler 18 months ago in our production flow, we have successfully taped out more than 30 ASIC chips," said Yoshito Muraishi, director of CAD Development at K-Micro. "It has helped us achieve significant improvements in terms of timing, area, and power and as a result, we encourage our ASIC customers to use RTL Compiler for RTL synthesis. We are ready to support its netlists."
Encounter RTL Compiler global synthesis has proven through tapeouts to deliver improved performance, smaller die sizes, lower power consumption, and faster design closure through place and route. Cadence defines this metric as quality of silicon (QoS). This ability to produce smaller, faster and cooler chips in less time has increased customer competitiveness and reduced overall costs.
"We are extremely pleased that Encounter RTL Compiler has consistently improved QoS for Kawasaki Microelectronics' tapeouts of its ASIC chips," said Dr. Chi-Ping Hsu, corporate vice president at Cadence. "Encounter RTL Compiler is setting new standards for better quality of chip designs."
Encounter RTL Compiler has been used in production by more than 100 customers worldwide for competitive markets in consumer, communications, computer, networking, graphics, and system-on-chip (SoC) designs.
About Kawasaki Microelectronics
K-Micro is a leader in advanced yet affordable ASIC technology. The company's innovative technologies and world-class design support are used in the consumer electronics, computer, office-automation, networking and storage markets. The company is an active participant in industry standards organizations, including the Wi-Fi Alliance, Optical Internetworking Forum (OIF), PCI Special Interest Group (PCI-SIG), USB Implementers Forum, MPEG Industry Forum (MPEGIF), Mobile Computing Promotion Consortium (MCPC), the Digital Display Working Group (DDWG), SD Card Association (SDA) and OCP International Partnership (OCP-IP). K-Micro has design centers in Tokyo, Boston, San Jose, and Taipei. For more information, visit http://www.k-micro.com.
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Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, printed circuit boards and systems used in consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2004 revenues of approximately $1.2 billion, and has approximately 5,000 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com
Cadence Design Systems, Inc.
Product Solutions Dept
Kawasaki Microelectronics, Inc.