Fujitsu Semiconductor Adopts Cadence Chip Planning System for MCU Chips at Its Design Centers WorldwideFujitsu Semiconductor Achieves Time-to-Market Boost from Earlier Chip PlanningSAN JOSE, Calif., 08 May 2012
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Fujitsu Semiconductor Limited has adopted the newly updated Cadence Chip Planning System
at its nine design centers spread around the globe. Fujitsu Semiconductor chose the Cadence system because of the time, accuracy and cost benefits it offers in the development of its MCU chips requiring large-scale integration (LSI).
“We continue to expand our use of the Cadence Chip Planning System at Fujitsu Semiconductor for one key reason--it helps us build better chips faster,” said Mutsuaki Kai, vice president of Environmental Technology Development and Products Engineering Division, Fujitsu Semiconductor Limited. “The latest enhancements to the technology have increased its value to us, and the combination of the technology and the support from Cadence has made this chip planning system a significant factor in our efforts to stay ahead of our competitors.”
The Cadence Chip Planning System enables early and accurate IC estimation, allowing tradeoffs between chip size, power consumption, cost, and time to market. Newly added features include advanced interactive I/O planning and links to board and package design solutions, enabling earlier and more accurate die size and power estimation. The Cadence technology delivers a unified chip planning environment that enables efficient information sharing among global design teams. Leveraging high fidelity models of semiconductor IP and manufacturing processes, the system provides a unified cockpit for technical and economic chip estimation which can be shared by multiple design teams. With the help of Cadence engineers, Fujitsu Semiconductor design teams further customized and tailored the system to take advantage of several of their unique technologies, enabling even more finely tuned chip plans.
“The Cadence Chip Planning System offers a unique, easy-to-use environment for customers to get the type of information they need to make and implement critical design decisions earlier in the development process,” said Pankaj Mayor, vice president of marketing, Cadence. “By deploying the system throughout its network of design centers, Fujitsu Semiconductor is helping ensure its engineering teams can work together efficiently to make the best possible decisions for developing LSI devices that are both high quality and profitable.”
Fujitsu Semiconductor now utilizes the Cadence Chip Planning System for its design teams worldwide.
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Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com