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Cadence Contributes Technology to Boost Verification of Complex Mixed-Signal Chips
Donated to the Accellera Standards Group, the Wreal Model Enables Faster and More Comprehensive Verification

SAN JOSE, Calif., 21 Apr 2010

Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, today announced that it has contributed to the Accellera standards organization new technology that can help engineers conduct faster and more thorough functional verification on complex mixed-signal SoCs. Cadence® donated a set of extensions to the wreal feature of the Verilog-AMS real numbered modeling capability. These Cadence extensions are designed to improve accuracy and offer better plug-and-play with analog models. Wreal enables engineers to conduct functional verification on these SoCs at digital speed. Faster and deeper verification can translate to fewer re-spins and faster time to market.

“We thank Cadence for this significant and timely contribution to Accellera,” said Shrenik Mehta, chair of Accellera. “We welcome this new technology aimed at strengthening our Verilog-AMS standard, which is critical for engineers tasked with conducting efficient, yet deep, verification on some of today’s most complex chips.”

“As the industry leader in mixed-signal design enablement, we are contributing this open-format wreal technology to enable the development of interoperable solutions to meet the needs of our industry,” said Sandeep Mehndiratta, solutions marketing group director at Cadence. “With the ability to conduct mixed-signal verification at digital speeds—even running nightly regression tests—we are confident verification teams will see significant benefits from deploying this technology.”

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

About Accellera
Accellera, an industry organization formed in 2000, provides design and verification standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera’s partnership with the IEEE, Accellera standards are transferred to the IEEE standards body for formalization and ongoing change control. For more information, please visit www.accellera.org.

For more information, please contact:
Dean Solov
Cadence Design Systems, Inc.
408-944-7226
dsolov@cadence.com


Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc., in the USA and other countries. All other marks and names are the property of their respective owners