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TSMC Qualifies Cadence Encounter RTL Compiler for Next-Generation Reference Flow
RTL Compiler Synthesis Delivers Nanometer Results

San Jose, CA and HSINCHU, Taiwan, 13 Apr 2004

Taiwan Semiconductor Manufacturing Company, Ltd. [(TSMC) (TAIEX: 2330, NYSE: TSM)], the world's largest semiconductor foundry, and Cadence Design Systems, Inc. (NYSE:CDN) today announced planned integration of CadenceĀ® Encounter™ RTL Compiler into TSMC's next-generation Reference Flow. TSMC's qualification of Cadence's RTL Compiler marks another milestone in the companies' long-standing design chain collaboration.

The inclusion of RTL Compiler addresses key nanometer performance goals, improves timing closure, reduces device area and lowers power consumption for complex multi-million-gate system-on-chips (SoCs). RTL Compiler effectively uses TSMC's multiple-Vt (voltage threshold) libraries to optimize performance and leakage power in a single-pass optimization flow.

"We intend to instill designer confidence that high quality silicon is achievable, despite escalating chip complexity," said Genda Hu, vice president of corporate marketing at TSMC. "Integrating Cadence's RTL Compiler into our next-generation Reference Flow should help resolve challenging design issues and leverage TSMC libraries."

"As designers of complex industry leading graphics chips, we require the next-generation synthesis capabilities offered by Cadence's RTL Compiler," said Greg Buchner, vice president of engineering at ATI Technologies Inc. "By using RTL Compiler for some of our designs, we have been able to realize improved timing and reduced chip area along with a shortened design cycle time. The design methodology advances resulting from close collaboration between our partners TSMC and Cadence are important to our continuing success."

"Quality of Silicon" (QoS)
In nanometer design, every aspect of a chip becomes dominated by interconnect-related parameters, design rules, and failure mechanisms. In order to truly understand the physical properties of a design at 130nm and below, a new, meaningful metric for speed, area, power and test must be applied. QoS is the new generation metric that incorporates the impact of interconnect on design results "after wires."

Encounter RTL Compiler synthesis uses a unique, patented set of global focus synthesis technologies that offer chip designers the highest QoS in less time and with less effort, while still being backward compatible with the previous generation of synthesis tools that are based upon quality of results measurements.

"RTL Compiler has been successfully applied in production by many of the design teams undertaking the industry's most challenging projects and is gaining momentum with leaders such as TSMC," said Dr. Chi-Ping Hsu, corporate vice president, synthesis solutions, Cadence Design Systems, Inc. "RTL Compiler's best-of-breed global synthesis technology is yielding our customers higher performance or smaller area, or both."

About TSMC
TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry industry's largest portfolio of process-proven library, IP, design tools and reference flows. The company operates one advanced 300mm wafer fab, five eight-inch fabs and one six-inch wafer fab. TSMC also has substantial capacity commitments at its wholly-owned subsidiary, WaferTech, and its joint venture fab, SSMC. In early 2001, TSMC became the first IC manufacturer to announce a 90nm technology alignment program with its customers. TSMC's corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please see http://www.tsmc.com/.

About Cadence
Cadence is the largest supplier of electronic design technologies and engineering services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 4,800 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services is available at www.cadence.com/.

For more information, please contact:
Robin Owen
direct:408.975.3080
rowen@hoffman.com
The Hoffman Agency
for Cadence Design Systems, Inc
Dan Holden
direct:408.382.7921
dholden@tsmc.com
TSMC


Cadence and the Cadence logo are registered trademarks, and Encounter is a trademark of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.