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December

20 Dec 2005 Intersymbol Deploys Cadence Encounter Platform in Mixed-Signal Flow to Cut Design Cycles, Die Area19 Dec 2005 Faraday Successfully Completes a Range of 130-nm Tapeouts with Cadence Encounter19 Dec 2005 Cadence Delivers Major Upgrade for SoC Verification in Incisive Enterprise Family13 Dec 2005 Inphi Tapes Out High-speed Flip-chip Design with Cadence Encounter Platform12 Dec 2005 Cadence Delivers New RF Design Kit Targeting Customer Design Challenges in Wireless12 Dec 2005 Media Advisory: Keynote Interview at Microventures 2005 Conference Features Cadence CEO Mike Fister05 Dec 2005 P.A. Semi Develops 65nm, Multicore Processor Family Using Cadence Synthesis and Implementation05 Dec 2005 New Cadence SoC Encounter GXL Addresses Customers' Nanometer Design Yield and Variation Challenges05 Dec 2005 Media Advisory: Cadence Invites You to Participate in the Cadence Analyst Dinner Webcast05 Dec 2005 Cadence Completes Digital Product Line Segmentation with Introduction of Encounter GXL Technologies05 Dec 2005 New Cadence Encounter Conformal Low Power GXL Addresses Customer Verification Challenges05 Dec 2005 Cadence Extends Synthesis Technology Lead with New Encounter RTL Compiler GXL
 
November

28 Nov 2005 Media Advisory: Cadence Seeks Silicon Valley Beneficiary for 2006 Stars & Strikes Fundraiser14 Nov 2005 Freescale and Cadence partner to innovate semiconductor product design14 Nov 2005 Cadence Introduces Incisive Enterprise, Linking Multiple Specialists and Languages14 Nov 2005 Initial Ballot to Make e Language an IEEE Standard Passes Overwhelmingly09 Nov 2005 Hitachi Communication Technologies Chooses Cadence Incisive Enterprise Palladium II to Reduce Overall Verification Risks08 Nov 2005 Kawasaki Micro Improves Timing, Area, Power of ASICS with Cadence Synthesis07 Nov 2005 Kawasaki Micro Maximizes Delay Test Coverage with Latest Cadence Technology07 Nov 2005 MediaTek Successfully Adopts Cadence Design Constraint Solution07 Nov 2005 Cadence Supports STARC Technology to Improve Delay Test Quality07 Nov 2005 Cadence Validates Test and Diagnostic Flow with Agilent07 Nov 2005 Atmel Creates First Single-Chip DVD/CD SoC Using Cadence Encounter Test02 Nov 2005 Media Advisory: Cadence Chief Financial Officer Bill Porter to Present at the Deutsche Bank Securities Global Semiconductor & Semiconductor Capital Equipment Conference
 
October

31 Oct 2005 Media Advisory: Cadence Chief Financial Officer Bill Porter to Present at the Morgan Stanley Software, Services, Internet & Networking Conference31 Oct 2005 Cadence Commences Trading Under New Symbol 'CDNS'26 Oct 2005 Cadence to List Solely on NASDAQ under New Symbol 'CDNS'26 Oct 2005 Cadence Reports Q3 Revenue Up 12% Over Q3 200424 Oct 2005 Cadence Advances Segmentation Strategy with 3 Tiers of Verification Products and Methodologies24 Oct 2005 Cadence Provides Powerful Low-Risk SystemVerilog Verification from Plan to Closure19 Oct 2005 Media Advisory: Cadence CEO Mike Fister to Deliver Keynote at In-Stat Fall Processor Forum17 Oct 2005 Cadence Backs User Demand for Accelerating IEEE P1647 e Standardization10 Oct 2005 Cadence Announces Best Overall Paper Presented at CDNLive! Silicon Valley Conference07 Oct 2005 Media Advisory: Cadence Announces Third Quarter 2005 Financial Results Webcast06 Oct 2005 Cadence and UMC Sign Agreement to Streamline Wireless Design in the Fabless Market04 Oct 2005 Cadence Aligns Capabilities for Consumer and Mobile Applications to Support ARM's Cortex-A8 Processor03 Oct 2005 Silicon & Software Systems Completes 65nm Consumer Chip with Cadence Encounter03 Oct 2005 Toshiba Tapes Out First Universalarray Chip with Cadence Encounter
 
September

27 Sep 2005 Media Advisory: Cadence Senior Vice President, Industry Alliances, Jan Willis, to Present at the 2005 FSA Suppliers EXpo & Conference26 Sep 2005 Cadence Announces New Capabilities to Simplify and Accelerate PowerPC Design26 Sep 2005 Comit Systems Speeds Time to Market with Cadence Synthesis12 Sep 2005 ARM and Cadence Optimize Digital SOC Design Through Expanded Collaboration12 Sep 2005 Cadence Delivers on First Milestone in Kits Strategy12 Sep 2005 New Cadence Product Segmentation and Technology Address Growth in Chip Complexity12 Sep 2005 New Cadence Physical Verification System Changes Physical Verification Paradigm09 Sep 2005 Media Advisory: Cadence Invites You to Attend the CDNLive! Audio Webcast08 Sep 2005 ITRI Tapes Out Low-Power DVFS Test Chip with Cadence Encounter Synthesis and Implementation08 Sep 2005 Cadence Announces Support for Industry-Standard OpenAccess 2.2 Database07 Sep 2005 Elan Microelectronics Harnesses Cadence Encounter Conformal Custom Technology06 Sep 2005 Magnum Semiconductor Becomes 100th Customer for Cadence Encounter RTL Compiler
 
August

31 Aug 2005 Cadence Enables SensorDynamics to Reduce Design Cycles and Speed Successful Tapeout29 Aug 2005 Media Advisory: Cadence to Hold News Conference/Luncheon at Inaugural CDNLive! User Conference24 Aug 2005 HiSilicon Technologies Collaborates With Cadence and SMIC to Produce Communications Device22 Aug 2005 Latest Advances in Cadence IC Packaging Technology Further Tighten Design Cycle15 Aug 2005 Cray Accelerates Development of Next-Generation Supercomputer Using Cadence Virtuoso Layout Migrate and Engineering Services08 Aug 2005 Media Advisory: Cadence Senior Vice President Marketing, Ajay Malhotra, to Present at the Moors & Cabot Semiconductor & Semiconductor Capital Equipment Conference01 Aug 2005 Fujitsu to Ship Initial Production Volumes of New Structured ASIC Built Using Cadence Encounter01 Aug 2005 SunPlus Shrinks DVD Chip Size, Design Time and Cost with Cadence Encounter RTL Compiler01 Aug 2005 Global Unichip Improves Quality of Silicon with Cadence Synthesis Technology
 
July

29 Jul 2005 Media Advisory: Cadence Chief Financial Officer Bill Porter to Present at the RBC North American Technology Conference28 Jul 2005 Cadence Announces Opening Keynote Speakers at First CDNLive! User Conference in Silicon Valley27 Jul 2005 Cadence Reports Q2 Revenue Up 12% Over Q2 200426 Jul 2005 OrCAD Technology Enhancements from Cadence Improve Efficiency for Scalable PCB Design26 Jul 2005 Cadence Helps Sequans Achieve Early Time to Market with Wireless Broadband Chip Tapeout25 Jul 2005 Accent, ARM and Cadence Collaborate to Improve Low-Power Design25 Jul 2005 New Cadence Allegro PCB Design Technology Shortens Design Time and Strengthens Design Chain20 Jul 2005 Adoption of Cadence Encounter RTL Compiler Accelerates in Japan12 Jul 2005 Epson Doubles Productivity in LCD Controller Chip Tapeout with Encounter RTL Compiler11 Jul 2005 Cadence Completes Leadership Transition08 Jul 2005 Media Advisory: Cadence Announces Second Quarter 2005 Financial Results Webcast
 
June

14 Jun 2005 Nethra Speeds Tapeout of Image Processor with Cadence Encounter RTL Compiler14 Jun 2005 Essence Reduces Synthesizable Area by 30 Percent with Cadence Encounter RTL Compiler14 Jun 2005 X Initiative Honors ATI and TSMC with Design-To-Manufacturing Catalyst Award13 Jun 2005 ATI, Cadence and TSMC Produce Industry's First Fabless X Architecture Chip13 Jun 2005 Cadence® Encounter™ Platform Now Available on 64-Bit Intel® Xeon™ Processor-Based Systems13 Jun 2005 Cadence Leads EDA Into New ERA of 'Enterprise VPA' Linking Design and Verification Specialists13 Jun 2005 Agere Adds Palladium II After Successful Rollout of TrueAdvantage Converged Access Solutions09 Jun 2005 Cadence Supports TSMC Reference Flow 6.0 to Accelerate 65-Nanometer Design09 Jun 2005 Media Advisory: Cadence Invites You to Participate in the Cadence Annual DAC Kickoff News Breakfast Webcast08 Jun 2005 Cadence Delivers 50% Power Savings in Latest STARC Production Flow08 Jun 2005 Virage Logic and Cadence Further Enable Low-Power Design08 Jun 2005 Oki Develops Analog Blocks Five Times Faster with Cadence Technology
 
May

26 May 2005 Media Advisory: Cadence President & Chief Executive Officer, Mike Fister, to Present at the SG Cowen Technology Conference25 May 2005 New Cadence PowerMeter Technology Enables Signoff-quality Dynamic Power Rail Verification25 May 2005 Cadence, IBM, Chartered Continue Collaboration to Enable 90-nanometer Design Success24 May 2005 Media Advisory: Cadence Senior Vice President and Chief Financial Officer, Bill Porter, to Present at the Prudential European Technology Conference16 May 2005 Cadence 'Stars & Strikes' Bowling Tournament Raises Over $1 Million for Fisher House at Palo Alto VA Hospital16 May 2005 Cadence Promotes 4 Senior Leaders and Appoints Controller and HR Chief12 May 2005 Media Advisory: Cadence Senior Vice President and Chief Financial Officer, Bill Porter, and Senior Vice President Marketing, Ajay Malhotra, to Present at the JPMorgan Technology Conference11 May 2005 Wells Fargo Analyst Joins Cadence as Corporate Vice President of Investor Relations09 May 2005 Cadence and Faraday Announce Library Collaboration for Nanometer Design09 May 2005 Ricoh Tapes Out 90nm Chip Early with Cadence Encounter RTL Compiler09 May 2005 Media Advisory: Ray Bingham, Cadence Executive Chairman, to Host Cadence Annual Meeting of Stockholders02 May 2005 New Cadence Incisive Formal Verifier Extends the Power of Formal Analysis to Designers' Desktops
 
April

27 Apr 2005 Cadence Reports Q1 Revenue of $293 Million, Up 10% Over Q1 200425 Apr 2005 Cadence PCI Express Solution Passes PCI-SIG Compliance Testing08 Apr 2005 Media Advisory: Cadence Announces First Quarter 2005 Financial Results Webcast07 Apr 2005 Cadence Completes Acquisition of Verisity01 Apr 2005 Media Advisory: Cadence Executive Chairman Ray Bingham to Address Industry Leaders at North America Chinese Semiconductor Association Conference
 
March

22 Mar 2005 Cadence Contribution to Accellera Boosts Efforts to Standardize IC Design Kits for Designers21 Mar 2005 Silicon Design Chain Collaboration Demonstrates Significant 90-nanometer Total Power reduction16 Mar 2005 Wipro Technologies Adopts Cadence Design Systems for Nanometer Designs07 Mar 2005 Enhanced Signal Integrity Analysis Enables Cadence Customers Address Low-power Design Challenges07 Mar 2005 Latest OrCAD Technology from Cadence Strengthens Scalable PCB-level Design07 Mar 2005 Collaborative PCB Design Challenges Tackled by new Cadence Partitioning Technology07 Mar 2005 Cadence Delivers Industry's First Full-chip Test Technology04 Mar 2005 Media Advisory: Cadence President and Chief Executive Officer, Mike Fister, to Present at the Morgan Stanley Semiconductor & Systems Conference03 Mar 2005 Media Advisory: Cadence Senior Vice President and Chief Financial Officer, Bill Porter, to Present at the Deutsche Bank Securities Global Software Conference
 
February

28 Feb 2005 Cadence and Verisity Announce Expiration of Hart-Scott-Rodino Waiting Period28 Feb 2005 Cadence and Virage Logic Collaborate to Deliver Timing and Signal Integrity Views to Enable Low-Power Design24 Feb 2005 GUC Tapes Out 7 Nanometer Designs with Cadence Encounter Technology23 Feb 2005 New Global Organization of Cadence Customers Created to Bolster Exchange of Ideas and Information22 Feb 2005 Media Advisory: Cadence Invites You to Participate in the Cadence 2005 Investor & Analyst Conference Webcast22 Feb 2005 Silicon & Software Systems Successfully Tapes Out Multiple 90nm Designs with Cadence Encounter Platform15 Feb 2005 ATI Technologies Selects Cadence Palladium II for Verification of Advanced DTV Chips14 Feb 2005 Cadence Selects 'Home Away from Home' for Veterans' Families as Beneficiary of Stars & Strikes Fundraiser14 Feb 2005 Cadence Donates Technology to IEEE to Enhance SystemVerilog Usability08 Feb 2005 Cadence Allegro Package Designer Named as One of EDN's Hot 100 Products of 200407 Feb 2005 Media Advisory: Cadence Senior Vice President & Chief Financial Officer, Bill Porter, to Present at the Merrill Lynch Computer Services & Software Conference04 Feb 2005 Cadence, IBM and Rising Collaborate to Enable Leading-Edge SCDMA/GSM RF IC Transceiver03 Feb 2005 Cadence Caps Strong 2004 with Solid Q4 Execution02 Feb 2005 Cadence First Encounter Global Physical Synthesis Wins 2005 IEC DesignVision Award
 
January

27 Jan 2005 Cadence Nominated for EDN Magazine Innovation of the Year Award26 Jan 2005 Sanyo Achieves Production Design Success for Digital Consumer Product with Cadence Encounter RTL Compiler25 Jan 2005 Fujitsu Successfully Completes 66 Consecutive Designs with Cadence Encounter24 Jan 2005 Cadence Introduces New Mixed-signal and Radio Frequency Capabilities to Address Wireless Design Challenges17 Jan 2005 Cadence Meets Design Constraint Challenges with Enhanced Encounter Conformal Technology12 Jan 2005 Cadence Augments Verification Solution and Expertise Through Acquisition of Verisity12 Jan 2005 Media Advisory: Cadence Vice President of European Marketing, Tim Barnes, to Present at the Needham Growth Conference07 Jan 2005 Media Advisory: Cadence Announces Fourth Quarter 2004 Financial Results Webcast