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May

16 May 2016 Uurmi Fog Removal Software Now Available on Cadence Tensilica Vision DSPs12 May 2016 Cadence Corporate Vice President - Finance Sean Sobers to Present at the Baird Global Consumer, Technology and Services Conference 10 May 2016 Cypress Adopts Cadence Digital Implementation and Circuit Simulation Tools for 40nm Automotive Designs09 May 2016 Tezzaron Cuts Design Time in Half with Cadence Full-Flow Digital RTL-to-Signoff Solution 04 May 2016 Faraday Reduces Packaging Design Time by 60 Percent Using Cadence OrbitIO Interconnect Designer and SiP Layout03 May 2016 Cadence Expands OrCAD Solution to Address Flex and Rigid-Flex Design Challenges for IoT, Wearables and Mobile Devices 03 May 2016 New Cadence Allegro Platform Accelerates Design of Compact, High-Performance Products Using Flex and Rigid-Flex Technologies02 May 2016 Cadence Announces New Tensilica Vision P6 DSP Targeting Embedded Neural Network Applications
 
April

28 Apr 2016 Cadence Completes Acquisition of Rocketick Technologies27 Apr 2016 Cadence Named One of FORTUNE Magazine’s 50 Best Workplaces for Giving Back25 Apr 2016 Cadence Chief Financial Officer Geoff Ribar to Retire in March 201725 Apr 2016 Cadence Reports First Quarter 2016 Financial Results25 Apr 2016 Toshiba Adopts Cadence Innovus Implementation System for Production Mobile Memory Controller Design18 Apr 2016 Media Alert: Connect, Share, and Inspire at CDNLive EMEA 2016—Cadence User Conference14 Apr 2016 Cadence Corporate Vice President - Finance James Haddad to Present at the Jefferies Technology, Media & Telecom Conference 13 Apr 2016 UMC Qualifies Cadence Virtuoso LDE Analyzer for its 28HPCU Process11 Apr 2016 Cadence to Acquire Rocketick, Delivering Revolutionary Parallel Logic Simulation Speed-up08 Apr 2016 Cadence Announces First Quarter 2016 Financial Results Webcast 07 Apr 2016 Cadence and University of Oxford Foster the Advancement of Formal Verification Innovation 05 Apr 2016 Cadence Unveils Next-Generation Virtuoso Platform Featuring Advanced Analog Verification Technologies and 10X Performance Improvements Across Platform
 
March

30 Mar 2016 Cadence Digital and Signoff Tools Certified on Samsung Foundry’s 14LPP Process22 Mar 2016 Ethertronics Reduces Design Schedule by Half and Achieves More than 60 Percent Mask Cost Savings Using Cadence Conformal ECO Designer16 Mar 2016 New MEMS Design Contest Encourages Advances in MEMS Technology15 Mar 2016 Cadence Design IP to Support TSMC 16FFC and 28HPC+ Process Technologies15 Mar 2016 Cadence Design Tools Certified for TSMC 7nm Design Starts and 10nm Production 15 Mar 2016 Cadence and TSMC Expand Collaboration Efforts on Integrated Design Flow for InFO Technology 14 Mar 2016 Cadence Announces DDR4 and LPDDR4 IP Achieve 3200 Mbps on TSMC 16nm FinFET Plus Process14 Mar 2016 Mellanox and Cadence Demonstrate PCI Express® 4.0 Multi-Lane PHY IP Interoperability 14 Mar 2016 Cadence Announces Availability of Complete IC Packaging Design and Analysis Solutions for Advanced Fan-Out Wafer-Level Chip Scale Packaging08 Mar 2016 Media Alert: Cadence to Showcase Design Solutions at TSMC’s 2016 Technology Symposium03 Mar 2016 Cadence Named to FORTUNE’s 2016 List of “100 Best Companies to Work For”
 
February

29 Feb 2016 Hiroshima University Research Team Accelerates Automotive Algorithm Development with Cadence Protium Rapid Prototyping Platform 24 Feb 2016 Silicon Labs Significantly Reduces Design Time Using the Cadence Mixed-Signal Low-Power Flow 23 Feb 2016 Realtek Licenses Cadence Tensilica Fusion DSP to Support Ultra-Low-Power Always-On Functions in the RTS3110/RTS3111 Context Hub Chip 22 Feb 2016 Spreadtrum Licenses Tensilica HiFi Audio/Voice DSP 22 Feb 2016 Cadence Announces the HiFi Integrator Studio 18 Feb 2016 Media Alert: Cadence to Showcase System Design and Verification Solutions at DVCon 201616 Feb 2016 Cadence Innovus Implementation System Qualified on Samsung 10nm FinFET Process16 Feb 2016 Cadence OrCAD Capture Delivers Support of Intel Schematic Connectivity Format for Automated Design Reviews 10 Feb 2016 Cadence President and Chief Executive Officer Lip-Bu Tan to Present at the Morgan Stanley Technology, Media & Telecom Conference 08 Feb 2016 Media Alert: Cadence to Showcase Tensilica DSPs and Design IP at Mobile World Congress 201608 Feb 2016 Building the Car of the Future Today—Cadence Showcases Automotive Solutions at embedded world 201603 Feb 2016 Cadence Reports Fourth Quarter and Fiscal Year 2015 Financial Results02 Feb 2016 Media Alert: Cadence to Host Embedded Neural Network Summit02 Feb 2016 New Cadence Modus Test Solution Delivers Up to 3X Reduction in SoC Test Time 01 Feb 2016 Cadence Announces Complete Digital and Signoff Reference Flow for Imagination Technologies’ PowerVR Series7 GPUs
 
January

26 Jan 2016 Media Alert: Qi Wang to Keynote Asia and South Pacific Design Automation Conference 201626 Jan 2016 Kandou Uses Cadence Analog/Mixed-Signal Timing and Power Signoff Tools to Deliver High-Speed SerDes PHY IP Design on 28nm Process20 Jan 2016 Cadence Sigrity 2016 Portfolio Improves Product Creation Time with PCB Design and Analysis Methodology for Multi-Gigabit Interfaces18 Jan 2016 HiSilicon Adopts Cadence Innovus Implementation System for Production DSP Designs13 Jan 2016 Arrow Electronics and Cadence Collaborate to Accelerate the Development of Production-Ready Products for Hardware Engineers13 Jan 2016 Media Alert: Cadence to Showcase Signal Integrity Solutions for System-Level, Power-Aware Multi-Gigabit Interface Compliance at DesignCon 201611 Jan 2016 Cadence Tempus Timing Signoff Solution Surpasses 200 Tapeout Milestone Within Two Years of Product Inception08 Jan 2016 Cadence Announces Fourth Quarter and Fiscal Year 2015 Financial Results Webcast 06 Jan 2016 Cadence Tensilica HiFi Audio DSP Becomes First IP Core Approved for Dolby MS12 Multistream Decoder05 Jan 2016 DSP Concepts Enhances Audio Weaver to Support Cadence Tensilica HiFi DSPs 04 Jan 2016 dbx-tv Total Technology Now Available on Cadence Tensilica HiFi Audio/Voice Processors