Freescale Improves Design Efficiency

In a world where time to market is the driving force, Freescale Semiconductor, a global leader in the design and manufacture of embedded semiconductors, recognizes the need to streamline processes across the board. In this spirit, Freescale chose Cadence as its primary EDA vendor in November 2005 with the goal of improving the efficiency of its design chain and reducing tool flows.

What are the results so far? In a far-ranging interview by Richard Wallace of EETimes, Chekib Akrout, vice president, design technology at Freescale reports that the number of supported flows has been reduced "from more than 15 to 3 or 4" across worldwide design centers with "almost 20 percent efficiency improvement." Much of this success is due to continued collaborative technology development between the R&D groups at Cadence and Freescale.

Read the article Freescale shrinks EDA tool flows and consider whether your company could achieve similar efficiency gains by consolidating flows with Cadence technology.

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