TSMC and Cadence Address System-Level Complexity with the TSMC ESL Reference Flow 12
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To meet today's huge complexity challenges, TSMC customers require tools and solutions that address higher levels of abstraction for system-level integration. The recent release of the TSMC Reference Flow 12 addresses these issues in several ways, and is based on a new design methodology developed by Cadence for the Cadence System Development Suite. The suite enables hardware-software co-design from architectural-level development to prototyping. It also supports virtual prototyping for TLM and TLM/RTL platforms for software development throughout the project. The Reference Flow scales to support 28nm development with a link to the TSMC power estimation tool, allowing users to better estimate the overall power consumption of their system and make early architectural trade-offs. Cadence-TSMC collaboration will enable customers to do software bring-up, verification, and debug much earlier in the process, which in turn will shorten overall time to market for our mutual customers.
Find out more at the TSMC System Realization Alliance web page