STMicroelectronics Saves Two Months of Debug Time Using Cadence Incisive Debug Analyzer
Company Equipped to Guarantee Quality of IP Verification


STMicroelectronics’s STxP70 team is responsible for defining, developing, and verifying the configurable processor and peripherals used across many worldwide divisions within the company. The team needed an efficient way to debug its register-transfer level (RTL) data cache IP flow. Unfortunately, the third party that created their testbench environment was no longer in the picture, and the team needed to quickly ramp up its understanding of the environment’s structure, variables, and sequences.

Already familiar with Cadence® tools, the team decided to use Cadence Incisive® Debug Analyzer, which provides comprehensive debug functionality in a single, integrated, and synchronized environment supporting multiple languages. As a result, STMicroelectronics enhanced its team’s productivity, reducing its debug time by two months.

“We were using print messages for debug, but using this method, we weren’t able to catch all of the errors and it was taking a really long time,” noted S. Sayar, Sr. Verification Engineer on the STxP70 team. “Using Incisive Debug Analyzer, we were able to learn the structure of our third party-developed testbench environment step by step, and built a reliable environment for fixing bugs.”

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