will be under system maintenance from Tuesday June 28, 6pm PT to Sunday July 3, 11pm PT. Login and registration will be disabled.
Home > About Cadence > Newsroom > Cadence Articles


15 Dec 2011 Key Cadence Technologies Receive Two Prestigious Awards01 Dec 2011 Fujitsu Semiconductor Europe GmbH Adopts the Cadence Functional Verification Methodology

26 Oct 2011 Xilinx and Cadence Announce a New Software-Centric Approach to Embedded Software Development17 Oct 2011 TSMC and Cadence Address System-Level Complexity with the TSMC ESL Reference Flow 12

26 Sep 2011 Cadence Delivers a Proven Path to Success in the Mobile Market09 Sep 2011 Cadence and Samsung Collaborate to Innovate at 20nm

15 Aug 2011 Virtuoso simulation technology shortens model validation cycle by 30%08 Aug 2011 Sunplus Technology Adopts Cadence Transaction-Level Modeling Flow for Faster System Development Time01 Aug 2011 Cadence and austriamicrosystems Build on Their 20-Year Partnership

29 Jul 2011 Kilopass Technology and Cadence

06 Jun 2011 Cadence Accelerates Development of Multiprocessor Mobile Devices with New ARM ACE Verification IP

27 May 2011 IBM-Cadence Collaboration Optimizes Hardware/Software Integration27 May 2011 VeriSilicon and Cadence Collaborate11 May 2011 Now Live! OrCAD Capture Marketplace with Industry-First Online PCB Apps03 May 2011 Cadence Brings Software and Hardware Closer Together Than Ever Before

25 Apr 2011 New Allegro 16.5 Technology11 Apr 2011 Cadence Announces Availability of the First Commercial DDR4 IP Solution06 Apr 2011 Spreadtrum Tapes Out its First 40nm Low-Power Chip with Cadence Silicon Realization Technologies

28 Mar 2011 Cadence Helps JDSU Produce “First-Time-Right” Optical Network Tester Board 14 Mar 2011 New Flow Boosts Productivity Up to 30% with Parasitic-Aware Design and In-Design DFM and Power Technologies

28 Feb 2011 New Cadence Verification IP Catalog for Silicon, SoC, and System Realization 24 Feb 2011 Cadence Rings NASDAQ Stock Market Opening Bell14 Feb 2011 Cadence Incisive Specman and Enterprise Manager help Siemens Drive Technologies ASIC Design Team Stay on Schedule with a Metric-Driven Verification Methodology

31 Jan 2011 Cadence Announces New Silicon-Validated Digital End-to-End Flow 18 Jan 2011 Allegro PCB SI on EDN’s Prestigious Hot 100 List: EDN selects Allegro PCB Signal Integrity as one of 2010’s top products10 Jan 2011 Cadence Boosts Verification Productivity for Complex FPGA/ASIC Design