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Home > About Cadence > Newsroom > Cadence Articles > Cadence ACE VIP Accelerates Development of Multi-Processor Mobile Devices
Today’s most popular mobile devices, such as tablets and smartphones, rely on multiple processors—such as the ARM® Cortex™ A15—to deliver the responsiveness that users demand of their software applications. These multi-processor systems employ mulitple caches and therefore require a cache coherency scheme to ensure only up-to-date data is used.

To speed up cache coherency management ARM has now introduced a protocol called AMBA® 4 Coherency Extensions (ACE) to implement this functionality it hardware. Simultaneously, Cadence announced the immediate availability of verification IP (VIP) for ARM’s new ACE protocol. This enables our mutual customers to speed the development and verification of sophisticated multi-processor mobile devices. Using the ACE VIP in tandem with Cadence end-to-end Interconnect Monitor (ICM), designers now have the industry’s first complete solution for coherency verification.

“By working collaboratively with ARM and their leading Cortex A15 customers over the last year, Cadence has delivered a critical piece of VIP to speed the development and delivery of sophisticated ARM-based mobile devices,” said Ziv Binyamini, Corporate VP of System and Software Solutions for the Cadence Research and Development group. “We will continue to grow this strategic offering to ensure customers can manage the increasing challenges inherent to designing cache-coherent, multi-processor systems.”

Proven on more than 2,000 designs over the past 10 years, Cadence VIP for AMBA uses a metric-driven methodology to verify that AMBA designs comply with the specification. With today’s complex use scenarios introduced by cache coherency and multi-processor designs, advanced Cadence VIP is even more critical to complete design verification. The Cadence ACE VIP verifies each master and slave to ensure compliance with the ACE specification, and then works with the Interconnect Monitor to ensure coherency of the full SoC,. Both the VIP and ICM are necessary to give designers confidence that their designs are truly coherent.

The Cadence VIP Catalog, taking advantage of the best from both Cadence and Denali, comprises a broad and continually growing portfolio of protocol verification IP and memory models that verify a design’s functionality at silicon, SoC, and system levels. Cadence VIP for the ACE protocol is available immediately. Contact your Cadence field representative for additional information or visit the Cadence AMBA VIP page.

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