Cadence has unveiled its Palladium® XP II Verification Computing Platform, which delivers a 2X increase in verification productivity and up to four months faster time to market. The platform is a part of the enhanced Cadence® System Development Suite, which features expanded core system and system-on-chip (SoC) verification use models and new use models for hardware/software verification.
Patent-pending hybrid technology combines the Cadence Virtual System Platform with the Palladium XP series to deliver up to 60X speed-up for embedded OS verification and 10X performance increase in hardware/software verification.
According to Kent Goodin, executive vice president of engineering at Zenverge, "The Palladium XP II platform truly allows our software teams to develop production-worthy code prior to the IC’s mask release and arrival of the prototype. This has allowed Zenverge to engage with customers at least six months earlier than would be possible without the co-development aspects of the Palladium XP II emulation solution."
The Palladium XP II platform supports design configurations with capacity of up to 2.3 billion gates, up to 512 concurrent users, and up to 50 percent performance improvement for SoC verification. What’s more, the platform extends the support of the Cadence Accelerated Verification Intellectual Property (AVIP) portfolio to include PCIe, SRIOV, Ethernet, AHB, APB, HDMI, DSI, CSI, I2C, SimCard, and Keypad. Coupled with the existing AVIP portfolio, the Palladium XP series further extends its support for applications such as mobile Internet devices, computing, networking, processors, and audio/video.
By facilitating the high-speed transfer of interface traffic through a design under test in the Palladium XP II platform, AVIP allows you and your team to gain a substantial boost in verification performance of designs at any integration level: IP, subsystem, SoC, and system.
Understanding the increasing need for early, fast, and accurate hardware/software verification, Cadence has expanded the capabilities of our System Development Suite centered around the Palladium XP platform. Benefit from:
- Patent-pending hybrid technology that combines the Cadence Virtual System Platform with the Palladium XP series to deliver up to 60X speed-up for embedded OS verification and 10X performance speed-up for hardware/software verification
- The embedded testbench for advanced virtualization of system environments, which lets you verify peripheral software drivers before tapeout, so you can achieve faster post-silicon bring-up
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