Ricoh Corporation Experiences Fastest Design Bring-up with Palladium XP Solution
It’s no secret that time to market is essential in consumer electronics, so speeding the verification process for new technologies is crucial to success in this highly competitive market. Seeking a faster way to verify its new multifunction printer system on chip (SoC), Ricoh Corporation selected the Cadence® Palladium® XP verification computing platform following an extensive benchmarking process. With the Palladium XP platform, Ricoh achieved the fastest design bring-up. What’s more, when combined with Cadence PCIe 2.0 Accelerated Verification IP (AVIP), the Palladium XP solution delivered a 40X verification speed-up over register-transfer level (RTL) logic simulation.
“Ricoh is an important new Palladium XP customer for Cadence, and we are collaborating with its design team on the development and verification of their next-generation SoC,” said Nimish Modi, senior vice president, System and Software Realization Group at Cadence. “As the leader in system verification, Cadence is providing innovative solutions such as the simulation acceleration hot-swap technology between Palladium XP and Incisive® Enterprise Simulator tools as part of an integrated flow for users needing higher performance and productivity.”
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