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Silicon Realization Technical Seminars 

Technical seminars: Custom/Analog, PCB Design/OrCAD, and Functional Verification
Multiple Dates
Multiple Locations

Unified Custom/Analog Flow Seminar
Boost Productivity with the Latest Cadence Virtuoso Unified Custom/Analog Flow

If you are a current Cadence Virtuoso technology user and are looking to become even more productive, this technical seminar is for you. Find out how to eliminate unnecessary design iterations by capturing and maintaining design intent throughout the flow. Learn how Cadence flows for schematic-driven design, parasitic-aware design, rapid analog prototyping, and in-design signoff provide a deterministic path to convergence on your design goals. See technical demonstrations and discover how to gain greater productivity over the use of point tools.

Ottawa, Canada - 10/25Register
Shoreview, MN - 10/27Register

Who should attend?

What will you gain?


Allegro/OrCAD PCB Design and IC Packaging Seminar
Learn the Latest Capabilities of Allegro/OrCad 16.5 and Develop a Shorter, Predictable Path to Product Creation

In this full-day technical seminar, you will learn how to reduce your PCB design cycle time and overall cost by building predictable and efficient design flows using new Cadence Allegro/OrCAD 16.5 software. Learn how Allegro/OrCAD 16.5 can be used with your existing configuration to enable co-design/analysis between design disciplines, concurrent team design for design authoring, integration with business decision management systems, and other ways to improve your productivity.

If you are a PCB engineer or manager and are looking to become even more efficient and productive, this technical seminar is for you. You’ll see technical demonstrations of the latest Allegro/OrCAD 16.5 methodologies and flows and learn how to build higher quality, more competitive end products with greater productivity, predictability, and profitability.

Who should attend?

What will you gain?

Choose to attend either the Allegro or the OrCAD track.
  Allegro trackOrcad Track
Durham, NC - 10/20 RegisterRegister
Shoreview, MN - 10/27RegisterRegister

Incisive Functional Verification Seminar
Address your most complex SoC verification challenges. Learn proven and validated metric-driven verification methodologies to improve your overall productivity.

Verification has evolved into a complex project spanning multiple teams including digital, analog, and mixed signal, but the discontinuity associated with multiple, incompatible methodologies across these teams has limited productivity. The Universal Verification Methodology (UVM) addresses verification complexity and interoperability within companies and throughout the electronics industry. Cadence has extended the UVM to encompass verification of mixed-signal and low-power designs with multi-language environments. In this seminar, you will get an update on the UVM, learn about verification components and environments leveraging the UVM, and see how applying the Incisive Enterprise Verification Solution and its UVM extensions will help you close your verification faster.

This free, full-day seminar is designed for any engineers and/or technical managers who are interested in having better visibility and predictability in the overall verification process.

Columbia, MD - 10/18Register
Ottawa, Canada - 10/25Register

Who should attend?

What will you gain?

Agenda Topics