PCB West, returning to the Santa Clara Convention Center, encompasses the entire PCB supply chain and brings together engineers, designers, fabricators, assemblers, and managers for a unique opportunity to improve skills, increase knowledge, and network with one another.
On Wednesday, September 10, visit Cadence in booth #406 where we will be exhibiting OrCAD
® and Sigrity
® technologies which are great alone but better together! Stop by our booth to learn more about exciting new developments in these technologies and how we can help you design today’s complex PCBs and IC packaging.
Be sure to attend one or more of the following Cadence speaking sessions:
Wednesday, September 10, 9am – 10amConstraint-Driven Power Integrity
Speaker: Dennis Nagle, Cadence
Constraint-driven PCB design has proven to be the best way to improve the overall PCB design process. Design has moved beyond the typical “over the wall” methodology where the logical netlist was sent – and not much else. Despite tremendous strides in constraint-driven design, the typical PI design process still operates with amazing inefficiency. The analyze-edit-reanalyze loop often involves nothing more than sending a doc with desired changes to the designer and design files back for analysis. This talk will show how new innovative technology available to designers and PI engineers can drastically improve this process and reduce design cycle time for ensuring your board meets power delivery requirements. Simple changes in the way library and model data are handled in the flow can eliminate costly repetitive setup time. More dramatic improvements leverage PI engineer expertise, but put all PI-related design changes in both the DC and AC domains where they are best handled – in the hands of PCB designers.
Wednesday, September 10, 3pm – 4pmRouting Standards-Based Interfaces
Speaker: Greg Horlick
Industry’s need for faster, higher bandwidth that consumes less power has led to proliferation of standards-based interfaces like DDR3, DDR4, USB 3.x, SATA 3.0 on PCBs. These interfaces have a complex set of electrical and physical constraints. Timing closure – meeting all the timing, matching requirements – on PCBs is increasingly becoming an iterative, time-consuming and frustrating process for PCB designers. It is common to find several groups of signals that share common routing and timing information. Tuning, matching delay on these signals can be challenging, as changing one group may impact timing on another group. To address these challenges, layout designers need innovative tools that leverage the computing power and graphics to make it easy for PCB designers to get their job done. More important, these new tools must provide methods to reduce the time needed to meet all the constraints, which has become a highly intensive, time-consuming process. This talk covers new approaches to accelerate designing with interfaces from design authoring to constraint management to PCB layout and routing to tuning signals to meet complex constraints. It will show how PCB designers’ expertise and intuition can be leveraged to accelerate the design process.
Wednesday, September 10, 4pm – 5pmIntelligent PCB Design Data Transfer to Manufacturing Using IPC-2581
Speaker: Hemant Shah
This session will talk about what is in IPC-2581B and why you should care; consortium activities to support, validate and adopt RevB; and adoption status, including PCBs built using IPC-2581 and stack-up exchange using IPC-2581.
The IPC-2581 Consortium has been focused on adoption of the standard across the design and supply chain companies. Today, more than 50 companies are part of the consortium pushing for adoption. The companies range from systems companies to manufacturing companies and software companies that supply to these two segments. The consortium is focused on two aspects: one is to accelerate adoption of the IPC-2581 standard; the second is to collectively enhance the standard to address industry’s needs through an open, global “of the industry, by the industry, for the industry” approach.