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Club Hardware Seminar

11 Dec 2013  
Herzelia, Israel  

In this seminar, you will learn about hardware-assisted verification methods and technologies to accelerate your system-on-chip (SoC) hardware and software development process. You will be introduced to Cadence’s recently announced Palladium XP II Verification Computing Platform, Cadence® accelerated VIP, the latest SpeedBridge adapters, and new use models.

Space is limited. Register now!

Who should attend?
  • Verification and project managers
  • System validation engineers who are facing long simulation time hardware/ software (system) development challenges pre- and post-silicon
  • Current FPGA (or silicon) prototyping users who are looking for faster bring-up and turnaround time
  • Existing emulation/acceleration users

  • Registration and light breakfast
  • Palladium XP II overview
  • Advanced use models—Hybrid and ETB
  • System emulation and SpeedBridge solutions
  • Memory models, including customer case study
  • Lunch
  • Case studies—customer presentations
  • In-circuit acceleration introduction and live demonstration
  • Acceleration and accelerated VIP
  • Low-power solution
  • Q&A and lucky draw

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