Join ARM and Cadence for an in-depth session focusing on verification and implementation of ARM®-based designs. Cadence and ARM experts will present the integrated flow, technologies and methodologies of ARM and Cadence with case studies focusing on current cores as well as the new ARM® Cortex®-A50 (ARMv8, 64 bit) processor family, AMBA bus protocols and CoreLink™ system IPs.
Joint Sessions 10:30 – 10:45 Cadence/ARM opening words
10:45 – 11:45 ARM technology update: Cortex®-A50 family, System IP, Libraries
11:45 – 12:00 Cadence design IP update
12:00 – 12:30 Light Lunch
System and Verification Track 12:30 – 13:15 Cadence VIP – ACE/IVD/Roadmap
13:15 – 14:00 Measure and Optimize System Performance of a Smartphone RTL Design
14:00 – 14:15 Coffee Break
14:15 – 15:00 System Development Suite, VSP, Hybrid, Embedded Testbench
Who should attend?
- Implementation engineers
- Verification engineers
Questions About this Event?Send email to firstname.lastname@example.org