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Intel Developer’s Forum

 
Type:
Industry Conference  
Date:
10 Sep 2013 - 12 Sep 2013  
Location:
Moscone Convention Center, San Francisco, CA  

The Intel Developer’s Forum provides a great opportunity to go deep into Intel technology and see their roadmaps and plans for the future. It’s where developers, engineers, technology managers, and business leaders from across the industry can meet, share ideas, and learn about Intel’s latest developments.

Cadence will be in the Intel booth, demonstrating interoperability between Intel’s M-PCIe controller and the Cadence® M-PCIe controller with their silicon proven M-PHY IP.

Cadence will also be in booth 225, demonstrating its customizable standards-based intellectual property (IP) and leading-edge Verification IP (VIP). Come see the Cadence M-PHY application boards, developed for MIPI protocols such as MIPI CSI-3, DigRF, and UniPro, and widely used industry protocols such as PCI Express (PCIe), USB, and UFS. We’ll also showcase our PCIe Gen3 card with the latest PCIe Gen3 IP.

Visit us to discuss how you can quickly verify the IP in your designs as well as use Cadence IP controllers and PHYs in your next designs.

Questions About this Event?
Send email to events@cadence.com